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[ARM] tegra: clock: Don't BUG on changing an enabled PLL

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Change-Id: Id213fd4ad8ae1e4429e31625c8b61d6be3fe708f
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
2010-09-08 19:41:58 -07:00
parent 56a2d8caf7
commit a2b67e2884
1 changed files with 0 additions and 1 deletions
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arch/arm/mach-tegra/tegra2_clocks.c
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@@ -645,7 +645,6 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate)
const struct clk_pll_table *sel;
pr_debug("%s: %s %lu\n", __func__, c->name, rate);
BUG_ON(c->refcnt != 0);
input_rate = c->parent->rate;
for (sel = c->pll_table; sel->input_rate != 0; sel++) {