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drm/rockchip: dsi2: use mode crtc_* timing for hardware config

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The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie8a3855677606720214e41d99b90b9ff490e1db2
This commit is contained in:
Sandy Huang
2024-04-10 15:57:54 +08:00
committed by Tao Huang
parent 9915f0b201
commit a34e2cbc91
1 changed files with 8 additions and 8 deletions
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16
drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c
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@@ -753,14 +753,14 @@ static void dw_mipi_dsi2_ipi_set(struct dw_mipi_dsi2 *dsi2)
if (!(dsi2->mode_flags & MIPI_DSI_MODE_VIDEO))
return;
vact = mode->vdisplay;
vsa = mode->vsync_end - mode->vsync_start;
vfp = mode->vsync_start - mode->vdisplay;
vbp = mode->vtotal - mode->vsync_end;
hact = mode->hdisplay;
hsa = mode->hsync_end - mode->hsync_start;
hbp = mode->htotal - mode->hsync_end;
hline = mode->htotal;
vact = mode->crtc_vdisplay;
vsa = mode->crtc_vsync_end - mode->crtc_vsync_start;
vfp = mode->crtc_vsync_start - mode->crtc_vdisplay;
vbp = mode->crtc_vtotal - mode->crtc_vsync_end;
hact = mode->crtc_hdisplay;
hsa = mode->crtc_hsync_end - mode->crtc_hsync_start;
hbp = mode->crtc_htotal - mode->crtc_hsync_end;
hline = mode->crtc_htotal;
pixel_clk = mode->crtc_clock * MSEC_PER_SEC;