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CHROMIUM: drm: bridge/dw_hdmi: fix i2cm standard mode setting error

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I have uploaded a patch to switch DDC to standard mode in
(https://chromium-review.googlesource.com/298270), but that change
have influence the "spare register" in I2CM_DIV, I know this haven't
cause some know bug, but we need to fix it.

BUG=chrome-os-partner:34741
TEST=None

Change-Id: Iff678fb49828db9b8026422e302a03f687a7c862
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/302751
Commit-Ready: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
This commit is contained in:
Yakir Yang
2015-09-28 16:58:24 +08:00
committed by Huang, Tao
parent a9461aae8f
commit a4aebb4311
2 changed files with 7 additions and 1 deletions
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3
drivers/gpu/drm/bridge/dw-hdmi.c
View File

@@ -275,7 +275,8 @@ static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
/* Set Standard Mode speed */
hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV);
hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
/* Set done, not acknowledged and arbitration interrupt polarities */
hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);

5
drivers/gpu/drm/bridge/dw-hdmi.h
View File

@@ -1076,6 +1076,11 @@ enum {
HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
HDMI_I2CM_CTLINT_ARB_POL = 0x8,
HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
/* I2CM_DIV field values */
HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
HDMI_I2CM_DIV_FAST_MODE = 0x8,
HDMI_I2CM_DIV_STD_MODE = 0,
};
#endif /* __DW_HDMI_H__ */