shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 10:58:48 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: Add opp table for rk3588m

Browse Source 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I115741fd45d22dcf6d844d3ccfced18ed4a7c6dc
This commit is contained in:
Finley Xiao
2022-07-20 19:24:51 +08:00
committed by Tao Huang
parent 4bb7f23f4a
commit a61b80cc7d
2 changed files with 98 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
arch/arm64/boot/dts/rockchip/rk3588m.dtsi Normal file
View File

@@ -0,0 +1,77 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*
*/
&cluster0_opp_table {
/delete-node/ opp-1800000000;
opp-1704000000 {
opp-supported-hw = <0x02 0xffff>;
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <900000 900000 950000>,
<900000 900000 950000>;
opp-microvolt-L1 = <887500 887500 950000>,
<887500 887500 950000>;
opp-microvolt-L2 = <875000 875000 950000>,
<875000 875000 950000>;
opp-microvolt-L3 = <862500 862500 950000>,
<862500 862500 950000>;
opp-microvolt-L4 = <850000 850000 950000>,
<850000 850000 950000>;
opp-microvolt-L5 = <837500 837500 950000>,
<837500 837500 950000>;
opp-microvolt-L6 = <825000 825000 950000>,
<825000 825000 950000>;
clock-latency-ns = <40000>;
};
};
&cluster1_opp_table {
/delete-node/ opp-2208000000;
/delete-node/ opp-2256000000;
/delete-node/ opp-2304000000;
/delete-node/ opp-2352000000;
/delete-node/ opp-2400000000;
opp-2112000000 {
opp-supported-hw = <0x02 0xffff>;
opp-hz = /bits/ 64 <2112000000>;
opp-microvolt = <900000 900000 1000000>,
<900000 900000 1000000>;
opp-microvolt-L4 = <887500 887500 1000000>,
<887500 887500 1000000>;
opp-microvolt-L5 = <875000 875000 1000000>,
<875000 875000 1000000>;
opp-microvolt-L6 = <862500 862500 1000000>,
<862500 862500 1000000>;
opp-microvolt-L7 = <850000 850000 1000000>,
<850000 850000 1000000>;
clock-latency-ns = <40000>;
};
};
&cluster2_opp_table {
/delete-node/ opp-2208000000;
/delete-node/ opp-2256000000;
/delete-node/ opp-2304000000;
/delete-node/ opp-2352000000;
/delete-node/ opp-2400000000;
opp-2112000000 {
opp-supported-hw = <0x02 0xffff>;
opp-hz = /bits/ 64 <2112000000>;
opp-microvolt = <900000 900000 1000000>,
<900000 900000 1000000>;
opp-microvolt-L4 = <887500 887500 1000000>,
<887500 887500 1000000>;
opp-microvolt-L5 = <875000 875000 1000000>,
<875000 875000 1000000>;
opp-microvolt-L6 = <862500 862500 1000000>,
<862500 862500 1000000>;
opp-microvolt-L7 = <850000 850000 1000000>,
<850000 850000 1000000>;
clock-latency-ns = <40000>;
};
};

38
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -570,8 +570,8 @@
compatible = "operating-points-v2";
opp-shared;
nvmem-cells = <&cpul_leakage>;
nvmem-cell-names = "leakage";
nvmem-cells = <&cpul_leakage>, <&specification_serial_number>;
nvmem-cell-names = "leakage", "specification_serial_number";
rockchip,supported-hw;
rockchip,opp-shared-dsu;
@@ -690,7 +690,7 @@
clock-latency-ns = <40000>;
};
opp-1800000000 {
opp-supported-hw = <0xff 0xffff>;
opp-supported-hw = <0xfd 0xffff>;
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <950000 950000 950000>,
<950000 950000 950000>;
@@ -714,8 +714,8 @@
compatible = "operating-points-v2";
opp-shared;
nvmem-cells = <&cpub0_leakage>;
nvmem-cell-names = "leakage";
nvmem-cells = <&cpub0_leakage>, <&specification_serial_number>;
nvmem-cell-names = "leakage", "specification_serial_number";
rockchip,supported-hw;
rockchip,pvtm-voltage-sel = <
@@ -873,7 +873,7 @@
clock-latency-ns = <40000>;
};
opp-2208000000 {
opp-supported-hw = <0xff 0xffff>;
opp-supported-hw = <0xfd 0xffff>;
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <987500 987500 1000000>,
<987500 987500 1000000>;
@@ -894,28 +894,28 @@
clock-latency-ns = <40000>;
};
opp-2256000000 {
opp-supported-hw = <0xff 0x13>;
opp-supported-hw = <0xfd 0x13>;
opp-hz = /bits/ 64 <2256000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2304000000 {
opp-supported-hw = <0xff 0x24>;
opp-supported-hw = <0xfd 0x24>;
opp-hz = /bits/ 64 <2304000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2352000000 {
opp-supported-hw = <0xff 0x48>;
opp-supported-hw = <0xfd 0x48>;
opp-hz = /bits/ 64 <2352000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2400000000 {
opp-supported-hw = <0xff 0x80>;
opp-supported-hw = <0xfd 0x80>;
opp-hz = /bits/ 64 <2400000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
@@ -927,8 +927,8 @@
compatible = "operating-points-v2";
opp-shared;
nvmem-cells = <&cpub1_leakage>;
nvmem-cell-names = "leakage";
nvmem-cells = <&cpub1_leakage>, <&specification_serial_number>;
nvmem-cell-names = "leakage", "specification_serial_number";
rockchip,supported-hw;
rockchip,pvtm-voltage-sel = <
@@ -1086,7 +1086,7 @@
clock-latency-ns = <40000>;
};
opp-2208000000 {
opp-supported-hw = <0xff 0xffff>;
opp-supported-hw = <0xfd 0xffff>;
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <987500 987500 1000000>,
<987500 987500 1000000>;
@@ -1103,28 +1103,28 @@
clock-latency-ns = <40000>;
};
opp-2256000000 {
opp-supported-hw = <0xff 0x13>;
opp-supported-hw = <0xfd 0x13>;
opp-hz = /bits/ 64 <2256000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2304000000 {
opp-supported-hw = <0xff 0x24>;
opp-supported-hw = <0xfd 0x24>;
opp-hz = /bits/ 64 <2304000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2352000000 {
opp-supported-hw = <0xff 0x48>;
opp-supported-hw = <0xfd 0x48>;
opp-hz = /bits/ 64 <2352000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
clock-latency-ns = <40000>;
};
opp-2400000000 {
opp-supported-hw = <0xff 0x80>;
opp-supported-hw = <0xfd 0x80>;
opp-hz = /bits/ 64 <2400000000>;
opp-microvolt = <1000000 1000000 1000000>,
<1000000 1000000 1000000>;
@@ -5555,6 +5555,10 @@
cpu_code: cpu-code@2 {
reg = <0x02 0x2>;
};
specification_serial_number: specification-serial-number@6 {
reg = <0x06 0x1>;
bits = <0 5>;
};
otp_id: id@7 {
reg = <0x07 0x10>;
};