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clk: rockchip: associate SCLK_MAC_PLL on rk3288

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see:
http://elixir.free-electrons.com/linux/v4.8/source/Documentation/devicetree/bindings/net/rockchip-dwmac.txt#L32

Change-Id: Ibf94d88219b13f5dd16cfdeb02d1b255e695399f
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Jacob Chen
2017-09-21 14:24:39 +08:00
committed by Tao Huang
parent 60e52d5730
commit a6db0e8ae6
2 changed files with 2 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3288.c
View File

@@ -605,7 +605,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKGATE_CON(2), 13, GFLAGS,
&rk3288_uart4_fracmux),
COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0,
COMPOSITE(SCLK_MAC_PLL, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0,
RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(2), 5, GFLAGS),
MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT,

1
include/dt-bindings/clock/rk3288-cru.h
View File

@@ -91,6 +91,7 @@
#define SCLK_VIP_OUT 127
#define SCLK_DDRCLK 128
#define SCLK_MAC_PLL 150
#define SCLK_MAC 151
#define SCLK_MACREF_OUT 152