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clk: rockchip: link: Add pclk_vo0_grf clock

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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I321e5dbcb4fd32f41ac85d284e511bc8ad1ed789
This commit is contained in:
Wyon Bi
2022-02-25 09:18:13 +08:00
committed by Tao Huang
parent 58948b97b3
commit a80efcc59c
1 changed files with 1 additions and 0 deletions
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drivers/clk/rockchip/clk-link.c
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@@ -95,6 +95,7 @@ static const struct rockchip_link_info rk3588_clk_gate_link_info[] = {
GATE_LINK("aclk_av1_pre", "aclk_av1_root", 1),
GATE_LINK("pclk_av1_pre", "pclk_av1_root", 4),
GATE_LINK("hclk_sdio_pre", "hclk_sdio_root", 1),
GATE_LINK("pclk_vo0_grf", "pclk_vo0_root", 10),
};
static const struct rockchip_link rk3588_clk_gate_link = {