arm: dts: rockchip: thermal: update soc's sw/hw over temperature power off degree

to cope with Wide Temperature Range test, we maxamize
soc's sw/hw over temperature power off degree.

fow now, 115 degree Celsius is set to trigger sw powering off.
if sw function does not work and temperature is continuing to
grow up, and till 120 degree Celsius, hw powering off/reset
is triggered.

Change-Id: I751e9ea754f434bc20df39fdbdb40216a1582c39
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
This commit is contained in:
Rocky Hao
2018-06-04 14:55:49 +08:00
committed by Tao Huang
parent 1d36a94941
commit a85ad02a4b
5 changed files with 14 additions and 13 deletions

View File

@@ -656,7 +656,7 @@
type = "passive";
};
soc_crit: soc-crit {
temperature = <90000>; /* millicelsius */
temperature = <115000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
@@ -706,7 +706,7 @@
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <0>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-temp = <120000>;
status = "disabled";
};

View File

@@ -497,8 +497,8 @@
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <90000>; /* millicelsius */
soc_crit: soc-crit {
temperature = <115000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
@@ -560,7 +560,8 @@
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-temp = <120000>;
rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
status = "disabled";
};

View File

@@ -536,7 +536,7 @@
type = "passive";
};
soc_crit: soc-crit {
temperature = <95000>;
temperature = <115000>;
hysteresis = <2000>;
type = "critical";
};
@@ -583,7 +583,7 @@
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <100000>;
rockchip,hw-tshut-temp = <120000>;
#thermal-sensor-cells = <1>;
status = "disabled";
};

View File

@@ -415,8 +415,8 @@
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <95000>; /* millicelsius */
soc_crit: soc-crit {
temperature = <115000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
@@ -478,7 +478,7 @@
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-temp = <120000>;
status = "disabled";
};

View File

@@ -802,8 +802,8 @@
type = "passive";
};
soc_crit: soc-crit {
temperature = <95000>;
hysteresis = <2000>;
temperature = <115000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
@@ -849,7 +849,7 @@
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-temp = <120000>;
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&otp_gpio>;
pinctrl-1 = <&otp_out>;