shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 10:58:48 +09:00
Code Issues Packages Projects Releases Wiki Activity

ASoC: rockchip: i2s: add support 'rockchip,clk-trcm' property

Browse Source 
If there is only one lrck (tx or rx) by hardware, we need to
use 'rockchip,clk-trcm' specify which lrck can be used.

Change-Id: I3bf8d87a6bc8c45e183040012d87d8be21a4c133
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This commit is contained in:
Xing Zheng
2018-07-17 12:58:38 +08:00
committed by Tao Huang
parent 1c11152a36
commit a90d2f0000
1 changed files with 13 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
sound/soc/rockchip/rockchip_i2s.c
View File

@@ -54,6 +54,7 @@ struct rk_i2s_dev {
const struct rk_i2s_pins *pins;
unsigned int bclk_ratio;
spinlock_t lock; /* tx/rx lock */
unsigned int clk_trcm;
};
static int i2s_runtime_suspend(struct device *dev)
@@ -304,7 +305,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct rk_i2s_dev *i2s = to_info(dai);
struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
unsigned int val = 0;
unsigned int mclk_rate, bclk_rate, div_bclk, div_lrck;
@@ -404,13 +404,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
I2S_DMACR_RDL(16));
val = I2S_CKR_TRCM_TXRX;
if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates)
val = I2S_CKR_TRCM_TXONLY;
regmap_update_bits(i2s->regmap, I2S_CKR,
I2S_CKR_TRCM_MASK,
val);
return 0;
}
@@ -493,7 +486,6 @@ static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = {
static struct snd_soc_dai_driver rockchip_i2s_dai = {
.probe = rockchip_i2s_dai_probe,
.ops = &rockchip_i2s_dai_ops,
.symmetric_rates = 1,
};
static const struct snd_soc_component_driver rockchip_i2s_component = {
@@ -695,6 +687,18 @@ static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res,
}
}
i2s->clk_trcm = I2S_CKR_TRCM_TXRX;
if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) {
if (val >= 0 && val <= 2) {
i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT;
if (i2s->clk_trcm)
dai->symmetric_rates = 1;
}
}
regmap_update_bits(i2s->regmap, I2S_CKR,
I2S_CKR_TRCM_MASK, i2s->clk_trcm);
if (dp)
*dp = dai;