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arm64: dts: rockchip: rk3588: Drop unused reset from hdptxphy
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com> Change-Id: Ia9e9c76dcf24f6effd73f7e018d6e65ec1a587fb
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@@ -686,12 +686,9 @@
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reg = <0x0 0xfed70000 0x0 0x2000>;
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clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX1>;
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clock-names = "ref", "apb";
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resets = <&cru SRST_HDPTX1>, <&cru SRST_P_HDPTX1>,
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<&cru SRST_HDPTX1_INIT>, <&cru SRST_HDPTX1_CMN>,
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<&cru SRST_HDPTX1_LANE>, <&cru SRST_HDPTX1_ROPLL>,
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<&cru SRST_HDPTX1_LCPLL>;
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reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
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"lcpll";
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resets = <&cru SRST_P_HDPTX1>, <&cru SRST_HDPTX1_INIT>,
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<&cru SRST_HDPTX1_CMN>, <&cru SRST_HDPTX1_LANE>;
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reset-names = "apb", "init", "cmn", "lane";
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rockchip,grf = <&hdptxphy1_grf>;
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#phy-cells = <0>;
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status = "disabled";
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@@ -4595,12 +4595,9 @@
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reg = <0x0 0xfed60000 0x0 0x2000>;
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clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
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clock-names = "ref", "apb";
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resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>,
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<&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>,
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<&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,
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<&cru SRST_HDPTX0_LCPLL>;
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reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
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"lcpll";
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resets = <&cru SRST_P_HDPTX0>, <&cru SRST_HDPTX0_INIT>,
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<&cru SRST_HDPTX0_CMN>, <&cru SRST_HDPTX0_LANE>;
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reset-names = "apb", "init", "cmn", "lane";
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rockchip,grf = <&hdptxphy0_grf>;
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#phy-cells = <0>;
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status = "disabled";
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