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drm: rockchip: hdmi: check sink max_tmds_clock in mode_valid
If sink max TMDS clock < 340MHz, we think the mode pixel clock greater than 340MHz should support YCbCr420, or it is a bad mode. Change-Id: I3930e943f5bdf7ca86b3e719c55e6aa57e8eff53 Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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@@ -255,6 +255,16 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
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*/
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if (mode->clock > INT_MAX / 1000)
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return MODE_BAD;
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/*
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* If sink max TMDS clock < 340MHz, we should check the mode pixel
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* clock > 340MHz is YCbCr420 or not and whether the platform supports
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* YCbCr420.
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*/
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if (mode->clock > 340000 &&
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connector->display_info.max_tmds_clock < 340000 &&
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(!drm_mode_is_420(&connector->display_info, mode) ||
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!connector->ycbcr_420_allowed))
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return MODE_BAD;
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if (!encoder) {
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const struct drm_connector_helper_funcs *funcs;
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