drm: rockchip: hdmi: check sink max_tmds_clock in mode_valid

If sink max TMDS clock < 340MHz, we think the mode pixel clock
greater than 340MHz should support YCbCr420, or it is a bad mode.

Change-Id: I3930e943f5bdf7ca86b3e719c55e6aa57e8eff53
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
This commit is contained in:
Algea Cao
2019-06-27 15:43:06 +08:00
parent dd9c925069
commit b33cca16c9

View File

@@ -255,6 +255,16 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
*/
if (mode->clock > INT_MAX / 1000)
return MODE_BAD;
/*
* If sink max TMDS clock < 340MHz, we should check the mode pixel
* clock > 340MHz is YCbCr420 or not and whether the platform supports
* YCbCr420.
*/
if (mode->clock > 340000 &&
connector->display_info.max_tmds_clock < 340000 &&
(!drm_mode_is_420(&connector->display_info, mode) ||
!connector->ycbcr_420_allowed))
return MODE_BAD;
if (!encoder) {
const struct drm_connector_helper_funcs *funcs;