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drm/rockchip: vop2: add port_extra_en register define

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Adding the register definition for port_extra_en can improve compatibility.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0d9dd3ab31662c97e7c7fb870597b192fb2cda75
This commit is contained in:
Sandy Huang
2025-08-23 09:34:05 +08:00
parent 571a6b9a39
commit c1306b1075
3 changed files with 4 additions and 2 deletions
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1
drivers/gpu/drm/rockchip/rockchip_drm_vop.h
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@@ -1003,6 +1003,7 @@ struct vop2_video_port_regs {
struct vop_reg hdr_dst_color_ctrl;
struct vop_reg hdr_src_alpha_ctrl;
struct vop_reg hdr_dst_alpha_ctrl;
struct vop_reg port_extra_en;
struct vop_reg bg_mix_ctrl;
struct vop_reg layer_sel;

4
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -11885,7 +11885,7 @@ static void rk3576_extra_alpha(struct vop2_video_port *vp, const struct vop2_zpo
vop2_writel(vop2, src_alpha_ctrl_offset, alpha.src_alpha_ctrl.val);
vop2_writel(vop2, dst_alpha_ctrl_offset, alpha.dst_alpha_ctrl.val);
vop2_writel(vop2, 0x500, 1);/* enable port0_extra_alpha_en */
VOP_MODULE_SET(vop2, vp, port_extra_en, 1);/* enable port0_extra_alpha_en */
} else {
/* alpha value need transfer to next mix, and the data from last mix is at bottom layer */
alpha_config.dst_pixel_alpha_en = true;
@@ -11906,7 +11906,7 @@ static void rk3576_extra_alpha(struct vop2_video_port *vp, const struct vop2_zpo
vop2_writel(vop2, dst_color_ctrl_offset, alpha.dst_color_ctrl.val);
vop2_writel(vop2, src_alpha_ctrl_offset, alpha.src_alpha_ctrl.val);
vop2_writel(vop2, dst_alpha_ctrl_offset, alpha.dst_alpha_ctrl.val);
vop2_writel(vop2, 0x500, 0);/* disable port0_extra_alpha_en */
VOP_MODULE_SET(vop2, vp, port_extra_en, 0);/* disable port0_extra_alpha_en */
}
}

1
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
View File

@@ -1600,6 +1600,7 @@ static const struct vop2_video_port_regs rk3576_vop_vp0_regs = {
.edpi_wms_hold_en = VOP_REG(RK3568_VP0_DUAL_CHANNEL_CTRL, 0x1, 30),
.edpi_wms_fs = VOP_REG(RK3568_VP0_DUAL_CHANNEL_CTRL, 0x1, 31),
.port_extra_en = VOP_REG(RK3528_OVL_SYS, 0x1, 0),
.bg_mix_ctrl = VOP_REG(RK3528_OVL_PORT0_BG_MIX_CTRL, 0xffff, 0),
.bg_dly = VOP_REG(RK3528_OVL_PORT0_BG_MIX_CTRL, 0xff, 24),
.pre_scan_htiming = VOP_REG(RK3568_VP0_PRE_SCAN_HTIMING, 0x1fff1fff, 0),