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Merge commit '2cf096b707117b9cba7268f2ac94c20db50bcc89'

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* commit '2cf096b707117b9cba7268f2ac94c20db50bcc89':
  arm64: dts: rockchip: rk3576-rk806/tablet: Fix the shutdown sequence for rk806
  drm/rockchip: vop: fix line_bw_mbyte init value error
  mtd: spinand: Zbit: Support new device ZB35Q04BYIG

Change-Id: I775c86b76e2c8e270dea0a07b89a54023f3404f6
This commit is contained in:
Tao Huang
2024-11-08 20:13:26 +08:00
parent 5c06bf0787 2cf096b707
commit c93f457521
4 changed files with 18 additions and 9 deletions
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8
arch/arm64/boot/dts/rockchip/rk3576-rk806.dtsi
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@@ -30,13 +30,13 @@
hotdie_temperture_threshold = <115>;
/* shutdown sequence */
shutdown-sequence = <2 2 2 0 2 0 2 1 1 2
1 0 0 0 0 2
2 2 2 2 2>;
2 2 2 2 2
1 0 0 0 0 2>;
/* low power forced shutdown sequence */
vb-shutdown-sequence = <2 2 2 0 2 0 2 0 0 2
0 0 0 0 0 2
2 2 2 2 2>;
2 2 2 2 2
0 0 0 0 0 2>;
/* 0: restart PMU;
* 1: reset all the power off reset registers,

8
arch/arm64/boot/dts/rockchip/rk3576-tablet.dtsi
View File

@@ -494,13 +494,13 @@
hotdie_temperture_threshold = <115>;
/* shutdown sequence */
shutdown-sequence = <2 2 2 0 2 0 2 1 1 2
1 0 0 0 0 2
2 2 2 2 2>;
2 2 2 2 2
1 0 0 0 0 2>;
/* low power forced shutdown sequence */
vb-shutdown-sequence = <2 2 2 0 2 0 2 0 0 2
0 0 0 0 0 2
2 2 2 2 2>;
2 2 2 2 2
0 0 0 0 0 2>;
/* PWRON_ON_TIME: 0:500mS; 1:20mS */
pwron-on-time-500ms;

2
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View File

@@ -3094,7 +3094,7 @@ static size_t vop_crtc_bandwidth(struct drm_crtc *crtc,
sort(pbandwidth, cnt, sizeof(pbandwidth[0]), vop_bandwidth_cmp, NULL);
vop_bw_info->line_bw_mbyte = vop_calc_max_bandwidth(pbandwidth, 0, cnt, vdisplay);
line_bw_mbyte = vop_calc_max_bandwidth(pbandwidth, 0, cnt, vdisplay);
kfree(pbandwidth);
/*
* line_bandwidth(MB/s)

9
drivers/mtd/nand/spi/zbit.c
View File

@@ -63,6 +63,15 @@ static const struct spinand_info zbit_spinand_table[] = {
&update_cache_variants),
0,
SPINAND_ECCINFO(&zb35q01b_ooblayout, NULL)),
SPINAND_INFO("ZB35Q04BYIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xA3),
NAND_MEMORG(1, 2048, 128, 128, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&zb35q01b_ooblayout, NULL)),
};
static const struct spinand_manufacturer_ops zbit_spinand_manuf_ops = {