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arm64: dts: rockchip: rk3588: Add hclk to dp node

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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Icd10a683360834d7326a22b37ee648626dc02883
This commit is contained in:
Wyon Bi
2021-11-23 18:36:44 +08:00
committed by Tao Huang
parent 7a66a44e9e
commit cd17a24cbd
2 changed files with 4 additions and 4 deletions
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4
arch/arm64/boot/dts/rockchip/rk3588.dtsi
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@@ -317,8 +317,8 @@
compatible = "rockchip,rk3588-dp";
reg = <0x0 0xfde60000 0x0 0x4000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_DP1>, <&cru CLK_AUX16M_1>;
clock-names = "apb", "aux";
clocks = <&cru PCLK_DP1>, <&cru CLK_AUX16M_1>, <&hclk_vo0>;
clock-names = "apb", "aux", "hclk";
assigned-clocks = <&cru CLK_AUX16M_1>;
assigned-clock-rates = <16000000>;
resets = <&cru SRST_DP1>;

4
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -2586,8 +2586,8 @@
compatible = "rockchip,rk3588-dp";
reg = <0x0 0xfde50000 0x0 0x4000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>;
clock-names = "apb", "aux";
clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>, <&hclk_vo0>;
clock-names = "apb", "aux", "hclk";
assigned-clocks = <&cru CLK_AUX16M_0>;
assigned-clock-rates = <16000000>;
resets = <&cru SRST_DP0>;