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arm64: dts: rockchip: rk3588: Add hdmi reference to hdmiphy pll clock

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Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ie3c154e151f4a5447cc0d6f94bcdfb86f5787c46
This commit is contained in:
Algea Cao
2022-07-13 20:46:50 +08:00
committed by Tao Huang
parent b8c6a7d52d
commit d0eb5198e1
2 changed files with 10 additions and 6 deletions
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8
arch/arm64/boot/dts/rockchip/rk3588.dtsi
View File

@@ -415,7 +415,8 @@
<&cru DCLK_VOP1>,
<&cru DCLK_VOP2>,
<&cru DCLK_VOP3>,
<&hclk_vo1>;
<&hclk_vo1>,
<&hdptxphy_hdmi_clk1>;
clock-names = "pclk",
"hpd",
"earc",
@@ -425,7 +426,8 @@
"dclk_vp1",
"dclk_vp2",
"dclk_vp3",
"hclk_vo1";
"hclk_vo1",
"link_clk";
resets = <&cru SRST_HDMITX1_REF>, <&cru SRST_HDMIHDP1>;
reset-names = "ref", "hdp";
power-domains = <&power RK3588_PD_VO1>;
@@ -807,7 +809,7 @@
hdptxphy_hdmi_clk1: clk-port {
#clock-cells = <0>;
status = "disabled";
status = "okay";
};
};

8
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -4124,7 +4124,8 @@
<&cru DCLK_VOP1>,
<&cru DCLK_VOP2>,
<&cru DCLK_VOP3>,
<&hclk_vo1>;
<&hclk_vo1>,
<&hdptxphy_hdmi_clk0>;
clock-names = "pclk",
"hpd",
"earc",
@@ -4134,7 +4135,8 @@
"dclk_vp1",
"dclk_vp2",
"dclk_vp3",
"hclk_vo1";
"hclk_vo1",
"link_clk";
resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>;
reset-names = "ref", "hdp";
power-domains = <&power RK3588_PD_VO1>;
@@ -5682,7 +5684,7 @@
hdptxphy_hdmi_clk0: clk-port {
#clock-cells = <0>;
status = "disabled";
status = "okay";
};
};