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drm/rockchip: vop: correct dclk_ddr define for rk3368

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dclk_ddr is supported on rk3368 vop, it would effect the
display quality on YUV420 mode.

Change-Id: Ia624a1f397e732d80d3908b8e712ae79d3ad7948
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reported-by: Huacong Yang <will.yang@rock-chips.com>
This commit is contained in:
Mark Yao
2017-08-11 09:51:08 +08:00
parent a36a1a666f
commit d1917fb492
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
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@@ -190,7 +190,7 @@ static const struct vop_ctrl rk3288_ctrl_data = {
.overlay_mode = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 16, 3, 2, -1),
.core_dclk_div = VOP_REG_VER(RK3366_DSP_CTRL0, 0x1, 4, 3, 4, -1),
.p2i_en = VOP_REG_VER(RK3366_DSP_CTRL0, 0x1, 5, 3, 4, -1),
.dclk_ddr = VOP_REG_VER(RK3366_DSP_CTRL0, 0x1, 8, 3, 4, -1),
.dclk_ddr = VOP_REG_VER(RK3368_DSP_CTRL0, 0x1, 8, 3, 2, -1),
.dp_en = VOP_REG_VER(RK3399_SYS_CTRL, 0x1, 11, 3, 5, -1),
.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),