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PCI: rockchip: dw: Add PCIE_DW_ROCKCHIP_RC_DMATEST macro limit for dma test

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Change-Id: Ife44ec0ef94bf731ba7b7056833b942608801ed4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2025-07-03 10:36:31 +08:00
committed by Tao Huang
parent 1a93d3ca23
commit d5de9fa853
2 changed files with 18 additions and 9 deletions
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20
drivers/pci/controller/dwc/Kconfig
View File

@@ -97,13 +97,6 @@ config PCIE_RK_THREADED_INIT
help
Enables threaded initialize Rockchip DW based PCIe controller.
config PCIE_DW_DMATEST
bool "DesignWare PCIe DMA test"
depends on PCIE_DW_ROCKCHIP
depends on !ROCKCHIP_PCIE_DMA_OBJ
help
Enables support for the DW PCIe controller DMA test.
config PCIE_DW_ROCKCHIP_EP
bool "Rockchip DesignWare PCIe EP controller"
select PCIE_DW
@@ -112,6 +105,19 @@ config PCIE_DW_ROCKCHIP_EP
help
Enables support for the DW PCIe controller in the Rockchip SoC.
config PCIE_DW_DMATEST
bool "DesignWare PCIe DMA test"
depends on (PCIE_DW_ROCKCHIP || PCIE_DW_ROCKCHIP_EP || PCIE_FUNC_RKEP)
depends on !ROCKCHIP_PCIE_DMA_OBJ
help
Enables support for the DW PCIe controller DMA test.
config PCIE_DW_ROCKCHIP_RC_DMATEST
bool "DesignWare PCIe Rockchip RC Enable DMA test"
depends on PCIE_DW_DMATEST
help
Enables support for the DW PCIe controller DMA test in the Rockchip SoC.
config PCI_EXYNOS
tristate "Samsung Exynos PCIe controller"
depends on ARCH_EXYNOS || COMPILE_TEST

7
drivers/pci/controller/dwc/pcie-dw-rockchip.c
View File

@@ -573,13 +573,16 @@ static int rk_pcie_init_dma_trx(struct rk_pcie *rk_pcie)
if (!rk_pcie_udma_enabled(rk_pcie))
return 0;
#ifdef PCIE_DW_ROCKCHIP_RC_DMATEST
rk_pcie->dma_obj = pcie_dw_dmatest_register(rk_pcie->pci->dev, true);
if (IS_ERR(rk_pcie->dma_obj)) {
dev_err(rk_pcie->pci->dev, "failed to prepare dmatest\n");
return -EINVAL;
} else if (!rk_pcie->dma_obj) { /* !CONFIG_ROCKCHIP_PCIE_DMA_OBJ */
return 0;
}
#endif
if (!rk_pcie->dma_obj)
return 0;
/* Enable client write and read interrupt */
rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_INTR_MASK, 0xc000000);