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phy: rockchip-inno-combphy: tuning lane 0 TX driver swing

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This patch tuning lane 0 TX driver swing for USB 3.0 to
get larger swing for LFPS.

Change-Id: I97d0cea4da86110fed349c07728366640346f7a8
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2018-11-05 12:07:57 +08:00
committed by Tao Huang
parent b5ee6b3a17
commit dc539d2455
1 changed files with 9 additions and 1 deletions
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10
drivers/phy/rockchip/phy-rockchip-inno-combphy.c
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@@ -611,7 +611,15 @@ static int rk1808_combphy_cfg(struct rockchip_combphy_priv *priv)
writel(reg, priv->mmio + 0x2000);
}
/* Tuning Tx */
/*
* Tuning Tx:
* offset 0x21b8 bit[7:4]: lane 0 TX driver swing
* tuning bits with weight, "1111" represents the
* largest swing and "0000" the smallest.
*/
reg = readl(priv->mmio + 0x21b8);
reg = (reg & ~0xf0) | 0xa0;
writel(reg, priv->mmio + 0x21b8);
/*
* Tuning Rx for RJTL: