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clk: rockchip: rk3562: Add ROCKCHIP_PLL_ALLOW_POWER_DOWN flag

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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7047fee17bd26e6b23fb84b431010880ff577276
This commit is contained in:
Finley Xiao
2023-02-09 15:27:01 +08:00
committed by Tao Huang
parent 813eabe45b
commit deb2de164b
2 changed files with 6 additions and 2 deletions
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7
drivers/clk/rockchip/clk-pll.c
View File

@@ -1685,8 +1685,11 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
init.name = pll_name;
#ifndef CONFIG_ROCKCHIP_LOW_PERFORMANCE
/* keep all plls untouched for now */
init.flags = flags | CLK_IGNORE_UNUSED;
if (clk_pll_flags & ROCKCHIP_PLL_ALLOW_POWER_DOWN)
init.flags = flags;
else
/* keep all plls untouched for now */
init.flags = flags | CLK_IGNORE_UNUSED;
#else
init.flags = flags;
#endif

1
drivers/clk/rockchip/clk.h
View File

@@ -578,6 +578,7 @@ struct rockchip_pll_clock {
#define ROCKCHIP_PLL_SYNC_RATE BIT(0)
/* normal mode only. now only for pll_rk3036, pll_rk3328 type */
#define ROCKCHIP_PLL_FIXED_MODE BIT(1)
#define ROCKCHIP_PLL_ALLOW_POWER_DOWN BIT(2)
#define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \
_lshift, _pflags, _rtable) \