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di: add madi&mcdi&nr4 for g12b

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PD#165090: di: add madi&mcdi&nr4 for g12b

Change-Id: Icebb9761915e005afca90974efc9c96d0d8b0c63
Signed-off-by: kele bai <kele.bai@amlogic.com>
This commit is contained in:
kele bai
2018-05-18 18:48:20 +08:00
committed by Yixun Lan
parent 8757969ec1
commit e3a10297e5
5 changed files with 34 additions and 18 deletions
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22
drivers/amlogic/media/deinterlace/deinterlace.c
View File

@@ -4860,8 +4860,8 @@ de_post_process(void *arg, unsigned int zoom_start_x_lines,
);
}
if (is_meson_txlx_cpu() ||
is_meson_gxlx_cpu() || is_meson_g12a_cpu()) {
if (is_meson_txlx_cpu() || is_meson_gxlx_cpu() ||
is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
di_post_read_reverse_irq(overturn, mc_pre_flag,
post_blend_en ? mcpre_en : false);
/* disable mc for first 2 fieldes mv unreliable */
@@ -5640,7 +5640,7 @@ static void di_unreg_process_irq(void)
enable_di_pre_mif(false, mcpre_en);
di_hw_uninit();
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu()) {
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
di_pre_gate_control(false, mcpre_en);
nr_gate_control(false);
} else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB)) {
@@ -5652,7 +5652,7 @@ static void di_unreg_process_irq(void)
if (mirror_disable) {
di_hw_disable(mcpre_en);
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu()) {
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
enable_di_post_mif(GATE_OFF);
di_post_gate_control(false);
di_top_gate_control(false, false);
@@ -5761,7 +5761,8 @@ static void di_pre_size_change(unsigned short width,
if (is_meson_txlx_cpu() ||
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu())
is_meson_g12a_cpu() ||
is_meson_g12b_cpu())
film_mode_win_config(width, height);
}
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL))
@@ -6176,7 +6177,7 @@ static int di_task_handle(void *data)
#endif
}
}
if (is_meson_g12a_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
#ifdef CLK_TREE_SUPPORT
clk_set_rate(de_devp->vpu_clkb,
de_devp->clkb_max_rate);
@@ -7116,7 +7117,8 @@ static void set_di_flag(void)
if (is_meson_txlx_cpu() ||
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu()) {
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
mcpre_en = true;
mc_mem_alloc = true;
pulldown_enable = false;
@@ -7131,7 +7133,8 @@ static void set_di_flag(void)
if (is_meson_txlx_cpu() ||
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu()) {
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
full_422_pack = true;
}
@@ -7141,7 +7144,8 @@ static void set_di_flag(void)
di_force_bit_mode = 8;
full_422_pack = false;
}
post_hold_line = is_meson_g12a_cpu()?10:17;
post_hold_line =
(is_meson_g12a_cpu() || is_meson_g12b_cpu())?10:17;
} else {
mcpre_en = false;
pulldown_enable = false;

3
drivers/amlogic/media/deinterlace/deinterlace_dbg.c
View File

@@ -231,7 +231,8 @@ void dump_di_reg_g12(void)
};
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu())
is_meson_g12a_cpu() ||
is_meson_g12b_cpu())
base_addr = 0xff900000;
else
base_addr = 0xd0100000;

14
drivers/amlogic/media/deinterlace/deinterlace_hw.c
View File

@@ -446,7 +446,7 @@ void di_hw_init(bool pd_enable, bool mc_enable)
unsigned short fifo_size_di = 0xc0;
switch_vpu_clk_gate_vmod(VPU_VPU_CLKB, VPU_CLK_GATE_ON);
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu())
|| is_meson_g12a_cpu() || is_meson_g12b_cpu())
di_top_gate_control(true, true);
else if (is_meson_gxl_cpu() || is_meson_gxm_cpu()
|| is_meson_gxlx_cpu())
@@ -456,7 +456,9 @@ void di_hw_init(bool pd_enable, bool mc_enable)
if (is_meson_txlx_cpu() ||
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() || is_meson_g12a_cpu()) {
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
/* vpp fifo max size on txl :128*3=384[0x180] */
/* di fifo max size on txl :96*3=288[0x120] */
fifo_size_vpp = 0x180;
@@ -485,7 +487,9 @@ void di_hw_init(bool pd_enable, bool mc_enable)
}
/* 17b3 is DI_chan2_luma_fifo_size */
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() || is_meson_g12a_cpu()) {
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
di_pre_gate_control(true, true);
di_post_gate_control(true);
}
@@ -501,7 +505,9 @@ void di_hw_init(bool pd_enable, bool mc_enable)
if (mc_enable)
mc_di_param_init();
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() || is_meson_g12a_cpu()) {
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
di_pre_gate_control(false, true);
di_post_gate_control(false);
di_top_gate_control(false, false);

12
drivers/amlogic/media/deinterlace/nr_drv.c
View File

@@ -352,7 +352,8 @@ static void linebuffer_config(unsigned short width)
static void nr2_config(unsigned short width, unsigned short height)
{
if (is_meson_txlx_cpu() || is_meson_g12a_cpu()) {
if (is_meson_txlx_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 2, 1);
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 15, 1);
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 17, 1);
@@ -400,7 +401,8 @@ void nr_all_config(unsigned short width, unsigned short height,
if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXLX))
cue_config(nr_param.pcue_parm, field_type);
if (is_meson_txlx_cpu() || is_meson_g12a_cpu()) {
if (is_meson_txlx_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
linebuffer_config(width);
nr4_config(nr_param.pnr4_parm, width, height);
}
@@ -779,7 +781,8 @@ void nr_process_in_irq(void)
cue_process_irq();
if (dnr_en)
dnr_process(&dnr_param);
if (is_meson_txlx_cpu() || is_meson_g12a_cpu()) {
if (is_meson_txlx_cpu() || is_meson_g12a_cpu()
|| is_meson_g12a_cpu()) {
noise_meter_process(nr_param.pnr4_parm, nr_param.frame_count);
luma_enhancement_process(nr_param.pnr4_parm,
nr_param.frame_count);
@@ -1125,7 +1128,8 @@ void nr_hw_init(void)
}
void nr_gate_control(bool gate)
{
if (!is_meson_txlx_cpu() && !is_meson_g12a_cpu())
if (!is_meson_txlx_cpu() && !is_meson_g12a_cpu()
&& !is_meson_g12b_cpu())
return;
if (gate) {
/* enable nr auto gate */

1
drivers/amlogic/media/deinterlace/register.h
View File

@@ -41,6 +41,7 @@ void DI_Wr_reg_bits(unsigned int adr, unsigned int val,
void DI_VSYNC_WR_MPEG_REG(unsigned int addr, unsigned int val);
void DI_VSYNC_WR_MPEG_REG_BITS(unsigned int addr,
unsigned int val, unsigned int start, unsigned int len);
#define HHI_VPU_CLKB_CNTL 0x83
#define VPU_WRARB_REQEN_SLV_L1C1 ((0x2795)) /* << 2) + 0xd0100000) */
#define VPU_ARB_DBG_STAT_L1C1 ((0x27b4)) /* << 2) + 0xd0100000) */