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clk: rockchip: add flag CLK_FRAC_DIVIDER_NO_LIMIT for fractional divider
There are some clks(uart) that do not have to comply with the 20 times fractional divider limit. Change-Id: I420d8ba3b5de65d9e0ea74920d5ea8450ae94465 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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@@ -222,12 +222,14 @@ static void rockchip_fractional_approximation(struct clk_hw *hw,
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*m = 1;
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*n = *parent_rate / rate;
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return;
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} else if (!(fd->flags & CLK_FRAC_DIVIDER_NO_LIMIT)) {
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pr_warn("%s p_rate(%ld) is low than rate(%ld)*20, use integer or half-div\n",
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clk_hw_get_name(hw),
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*parent_rate, rate);
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*m = 0;
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*n = 1;
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return;
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}
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pr_warn("%s p_rate(%ld) is low than rate(%ld)*20, use integer or half-div\n",
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clk_hw_get_name(hw), *parent_rate, rate);
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*m = 0;
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*n = 1;
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return;
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}
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}
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@@ -695,6 +695,10 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
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* @lock: register lock
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*
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* Clock with adjustable fractional divider affecting its output frequency.
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*
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* Flags:
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* CLK_FRAC_DIVIDER_NO_LIMIT - not need to follow the 20 times limit on
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* fractional divider
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*/
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struct clk_fractional_divider {
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struct clk_hw hw;
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@@ -715,6 +719,8 @@ struct clk_fractional_divider {
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#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
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#define CLK_FRAC_DIVIDER_NO_LIMIT BIT(2)
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extern const struct clk_ops clk_fractional_divider_ops;
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struct clk *clk_register_fractional_divider(struct device *dev,
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const char *name, const char *parent_name, unsigned long flags,
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