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sdcard: enable sdcard for G12A
PD#156734: clock tree, pinmux tested. Change-Id: I11088ea6d27c1788516c1b55c4ec81ade99ca112 Signed-off-by: Yonghui Yu <yonghui.yu@amlogic.com>
This commit is contained in:
@@ -108,6 +108,50 @@
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};
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};
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sd_emmc_b:sd@ffe05000 {
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status = "okay";
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compatible = "amlogic, meson-mmc-g12a";
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reg = <0x0 0xffe05000 0x0 0x2000>;
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interrupts = <0 190 1>;
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pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
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pinctrl-0 = <&sd_clk_cmd_pins>;
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pinctrl-1 = <&sd_all_pins>;
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clocks = <&clkc CLKID_SD_EMMC_B>,
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<&clkc CLKID_SD_EMMC_B_P0_COMP>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_FCLK_DIV5>;
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clock-names = "core", "clkin0", "clkin1", "clkin2";
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bus-width = <4>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <100000000>;
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non-removable;
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disable-wp;
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sd {
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pinname = "sd";
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ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
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caps = "MMC_CAP_4_BIT_DATA",
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"MMC_CAP_MMC_HIGHSPEED",
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"MMC_CAP_SD_HIGHSPEED",
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"MMC_CAP_NONREMOVABLE",
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"MMC_CAP_UHS_SDR12",
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"MMC_CAP_UHS_SDR25",
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"MMC_CAP_UHS_SDR50",
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"MMC_PM_KEEP_POWER",
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"MMC_CAP_NONREMOVABLE"; /**ptm debug */
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f_min = <400000>;
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f_max = <200000000>;
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max_req_size = <0x20000>; /**128KB*/
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card_type = <5>;
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/* 3:sdio device(ie:sdio-wifi),
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* 4:SD combo (IO+mem) card
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*/
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};
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};
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canvas{
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compatible = "amlogic, meson, canvas";
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dev_name = "amlogic-canvas";
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@@ -500,5 +500,28 @@
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};
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&pinctrl_periphs {
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/* sdemmc portB */
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sd_clk_cmd_pins:sd_clk_cmd_pins {
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mux {
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groups = "sdcard_cmd_c",
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"sdcard_clk_c";
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function = "sdcard";
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input-enable;
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bias-pull-up;
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};
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};
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sd_all_pins:sd_all_pins {
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mux {
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groups = "sdcard_d0_c",
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"sdcard_d1_c",
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"sdcard_d2_c",
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"sdcard_d3_c",
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"sdcard_cmd_c",
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"sdcard_clk_c";
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function = "sdcard";
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input-enable;
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bias-pull-up;
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};
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};
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};
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@@ -2932,6 +2932,8 @@ static int meson_mmc_probe(struct platform_device *pdev)
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if (aml_card_type_sdio(pdata)) /* if sdio_wifi */
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sdio_host = mmc;
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#ifndef CONFIG_MESON_CPU_EMULATOR
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/* disable sdcard detect irq for ptm */
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/*Register card detect irq : plug in & unplug*/
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if (pdata->gpio_cd && aml_card_type_non_sdio(pdata)) {
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mutex_init(&pdata->in_out_lock);
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@@ -2952,6 +2954,7 @@ static int meson_mmc_probe(struct platform_device *pdev)
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schedule_delayed_work(&host->cd_work, 50);
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#endif
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}
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#endif /* CONFIG_MESON_CPU_EMULATOR */
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pr_info("%s() : success!\n", __func__);
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return 0;
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@@ -3064,6 +3067,15 @@ static struct meson_mmc_data mmc_data_txhd = {
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.ds_pin_poll_bit = 11,
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};
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static struct meson_mmc_data mmc_data_g12a = {
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.chip_type = MMC_CHIP_G12A,
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.pinmux_base = 0xff634400,
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.clksrc_base = 0xff63c000,
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.ds_pin_poll = 0x3a,
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.ds_pin_poll_en = 0x48,
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.ds_pin_poll_bit = 13,
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};
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static const struct of_device_id meson_mmc_of_match[] = {
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{
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.compatible = "amlogic, meson-mmc-gxbb",
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@@ -3101,6 +3113,10 @@ static const struct of_device_id meson_mmc_of_match[] = {
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.compatible = "amlogic, meson-mmc-txhd",
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.data = &mmc_data_txhd,
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},
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{
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.compatible = "amlogic, meson-mmc-g12a",
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.data = &mmc_data_g12a,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, meson_mmc_of_match);
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@@ -52,10 +52,11 @@ int meson_mmc_clk_init_v3(struct amlsd_host *host)
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struct amlsd_platform *pdata = host->pdata;
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writel(0, host->base + SD_EMMC_CLOCK_V3);
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#ifndef SD_EMMC_CLK_CTRL
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ret = aml_emmc_clktree_init(host);
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if (ret)
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return ret;
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#endif
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/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
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vclkc = 0;
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pclkc->div = 60; /* 400KHz */
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@@ -92,11 +93,12 @@ static int meson_mmc_clk_set_rate_v3(struct amlsd_host *host,
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struct mmc_host *mmc = host->mmc;
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struct amlsd_platform *pdata = host->pdata;
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int ret = 0;
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struct clk *src0_clk = NULL;
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#ifdef SD_EMMC_CLK_CTRL
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u32 clk_rate, clk_div, clk_src_sel;
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struct amlsd_platform *pdata = host->pdata;
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#else
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struct clk *src0_clk = NULL;
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u32 vcfg = 0;
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struct sd_emmc_config *conf = (struct sd_emmc_config *)&vcfg;
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#endif
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@@ -397,6 +397,7 @@ void aml_devm_pinctrl_put(struct amlsd_host *host)
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}
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}
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#ifndef SD_EMMC_PIN_CTRL
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static struct pinctrl * __must_check aml_devm_pinctrl_get_select(
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struct amlsd_host *host, const char *name)
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{
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@@ -429,6 +430,34 @@ static struct pinctrl * __must_check aml_devm_pinctrl_get_select(
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}
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return p;
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}
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#else /* SD_EMMC_PIN_CTRL */
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static struct pinctrl * __must_check aml_devm_pinctrl_get_select(
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struct amlsd_host *host, const char *name)
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{
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u32 val;
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if (!strcmp("sd_clk_cmd_pins", name)) {
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val = readl(host->pinmux_base + PIN_MUX_REG9);
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val &= ~0xFFFFFF;
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val |= 0x110000;
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writel(val, host->pinmux_base + PIN_MUX_REG9);
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/* pullup status */
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pr_info("name %s -> pinmux 9 0x%x\n", name, val);
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} else if (!strcmp("sd_all_pins", name)) {
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val = readl(host->pinmux_base + PIN_MUX_REG9);
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val &= ~0xFFFFFF;
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val |= 0x111111;
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writel(val, host->pinmux_base + PIN_MUX_REG9);
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/* pullup status */
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pr_info("name %s -> pinmux 9 0x%x\n", name, val);
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} else
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pr_err("E: name %s do nothing.\n", name);
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return NULL;
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}
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#endif /* SD_EMMC_PIN_CTRL */
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void of_amlsd_xfer_pre(struct mmc_host *mmc)
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{
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@@ -489,10 +518,15 @@ void of_amlsd_xfer_pre(struct mmc_host *mmc)
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mutex_lock(&host->pinmux_lock);
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ppin = aml_devm_pinctrl_get_select(host, pinctrl);
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mutex_unlock(&host->pinmux_lock);
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/* bringup on ptm for g12 */
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#ifndef SD_EMMC_PIN_CTRL
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if (!IS_ERR(ppin)) {
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/* pdata->host->pinctrl = ppin; */
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break;
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}
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#else
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break;
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#endif
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/* else -> aml_irq_cdin_thread()
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*should be using one of the GPIO of card,
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* then we should wait here until the GPIO is free,
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@@ -40,4 +40,9 @@ extern int aml_sd_emmc_post_dma(struct amlsd_host *host,
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extern u32 aml_sd_emmc_tuning_transfer(struct mmc_host *mmc,
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u32 opcode, const u8 *blk_pattern, u8 *blk_test, u32 blksz);
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void aml_mmc_clk_switch_off(struct amlsd_host *host);
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void aml_mmc_clk_switch(struct amlsd_host *host,
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int clk_div, int clk_src_sel);
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#endif
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@@ -19,6 +19,12 @@
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#define AMLSD_H
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#include <linux/of_gpio.h>
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/* ptm or pxp simulation */
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#define CONFIG_MESON_CPU_EMULATOR
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/* hardcode clock, for debug or bringup */
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/* #define SD_EMMC_CLK_CTRL (1) */
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/* #define SD_EMMC_PIN_CTRL (1) */
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#define AML_MMC_MAJOR_VERSION 3
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#define AML_MMC_MINOR_VERSION 02
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#define AML_MMC_VERSION \
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@@ -170,6 +170,7 @@ enum mmc_chip_e {
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MMC_CHIP_AXG = 0x25,
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MMC_CHIP_GXLX = 0x26,
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MMC_CHIP_TXHD = 0x27,
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MMC_CHIP_G12A = 0x28,
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};
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struct meson_mmc_data {
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@@ -1586,30 +1587,30 @@ struct sd_emmc_desc_info {
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u32 resp_addr;
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};
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#define HHI_NAND_CLK_CNTL 0x97
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#define SD_EMMC_MAX_DESC_MUN 512
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#define SD_EMMC_REQ_DESC_MUN 4
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#define SD_EMMC_CLOCK_SRC_OSC 0 /* 24MHz */
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#define SD_EMMC_CLOCK_SRC_FCLK_DIV2 1 /* 1GHz */
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#define SD_EMMC_CLOCK_SRC_400MHZ 4
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#define SD_EMMC_CLOCK_SRC_MPLL 2 /* MPLL */
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#define SD_EMMC_CLOCK_SRC_DIFF_PLL 3
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#define SD_EMMC_IRQ_ALL 0x3fff
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#define SD_EMMC_RESP_SRAM_OFF 0
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#define SD_EMMC_MAX_DESC_MUN 512
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#define SD_EMMC_REQ_DESC_MUN 4
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#define SD_EMMC_CLOCK_SRC_OSC 0 /* 24MHz */
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#define SD_EMMC_CLOCK_SRC_FCLK_DIV2 1 /* 1GHz */
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#define SD_EMMC_CLOCK_SRC_400MHZ 4
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#define SD_EMMC_CLOCK_SRC_MPLL 2 /* MPLL */
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#define SD_EMMC_CLOCK_SRC_DIFF_PLL 3
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#define SD_EMMC_IRQ_ALL 0x3fff
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#define SD_EMMC_RESP_SRAM_OFF 0
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/*#define SD_EMMC_DESC_SET_REG*/
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#define SD_EMMC_DESC_REG_CONF 0x4
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#define SD_EMMC_DESC_REG_IRQC 0xC
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#define SD_EMMC_DESC_RESP_STAT 0xfff80000
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#define SD_EMMC_DESC_REG_CONF 0x4
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#define SD_EMMC_DESC_REG_IRQC 0xC
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#define SD_EMMC_DESC_RESP_STAT 0xfff80000
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#define SD_EMMC_IRQ_EN_ALL_INIT
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#define SD_EMMC_REQ_DMA_SGMAP
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/* #define SD_EMMC_CLK_CTRL*/
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/* #define SD_EMMC_DATA_TASKLET */
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#define STAT_POLL_TIMEOUT 0xfffff
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#define STAT_POLL_TIMEOUT 0xfffff
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#define STAT_POLL_TIMEOUT 0xfffff
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#define STAT_POLL_TIMEOUT 0xfffff
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#define MMC_RSP_136_NUM 4
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#define MMC_MAX_DEVICE 3
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#define MMC_TIMEOUT 5000
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#define MMC_RSP_136_NUM 4
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#define MMC_MAX_DEVICE 3
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#define MMC_TIMEOUT 5000
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/* #define pr_info(a...) */
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#define DBG_LINE_INFO() \
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@@ -1618,15 +1619,26 @@ struct sd_emmc_desc_info {
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}
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/* #define DBG_LINE_INFO() */
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/* #define dev_err(a,s) pr_info(KERN_INFO s); */
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/* fixme, those code should not be marco as vairous on chips */
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/* reg0 for BOOT */
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#define BOOT_POLL_UP (0x3A << 2)
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#define BOOT_POLL_UP_EN (0x48 << 2)
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/* reg1 for GPIOC(card) */
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#define CARD_POLL_UP (0x3B << 2)
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#define CARD_POLL_UP_EN (0x49 << 2)
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/* pinmux for sdcards, gpioC */
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#define PIN_MUX_REG6 (0xb6 << 2)
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#define PIN_MUX_REG9 (0xb9 << 2)
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#define AML_MMC_DISABLED_TIMEOUT 100
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#define AML_MMC_SLEEP_TIMEOUT 1000
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#define AML_MMC_OFF_TIMEOUT 8000
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#define AML_MMC_OFF_TIMEOUT 8000
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#define SD_EMMC_BOUNCE_REQ_SIZE (512*1024)
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#define SDHC_BOUNCE_REQ_SIZE (512*1024)
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#define SDIO_BOUNCE_REQ_SIZE (128*1024)
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#define MMC_TIMEOUT_MS 20
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#define MMC_TIMEOUT_MS (20)
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#define MESON_SDIO_PORT_A 0
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#define MESON_SDIO_PORT_B 1
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@@ -1641,12 +1653,12 @@ extern void amlsd_init_debugfs(struct mmc_host *host);
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extern struct mmc_host *sdio_host;
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#define SPI_BOOT_FLAG 0
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#define NAND_BOOT_FLAG 1
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#define EMMC_BOOT_FLAG 2
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#define CARD_BOOT_FLAG 3
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#define SPI_NAND_FLAG 4
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#define SPI_EMMC_FLAG 5
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#define SPI_BOOT_FLAG 0
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#define NAND_BOOT_FLAG 1
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#define EMMC_BOOT_FLAG 2
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#define CARD_BOOT_FLAG 3
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#define SPI_NAND_FLAG 4
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#define SPI_EMMC_FLAG 5
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#define R_BOOT_DEVICE_FLAG (aml_read_cbus(ASSIST_POR_CONFIG))
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