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arm64: dts: renesas: r8a774b1: Introduce beacon-rzg2n-kit
Beacon EmbeddedWorks is introducing a new kit based on the RZ/G2N SoC from Renesas. The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio. The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM as the RZ/G2M. This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains the base memory node, so an additional memory node isn't necessary. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-7-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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committed by
Geert Uytterhoeven
parent
33aaab6d5c
commit
ed6ae131b0
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb
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dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
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dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
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dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-beacon-rzg2n-kit.dtb
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dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb
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dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb
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dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex-idk-1110wr.dtb
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66
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts
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66
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts
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@@ -0,0 +1,66 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020, Compass Electronics Group, LLC
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*/
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/dts-v1/;
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#include "r8a774b1.dtsi"
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#include "beacon-renesom-som.dtsi"
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#include "beacon-renesom-baseboard.dtsi"
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/ {
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model = "Beacon Embedded Works RZ/G2N Development Kit";
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compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1";
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aliases {
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serial0 = &scif2;
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serial1 = &hscif0;
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serial2 = &hscif1;
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serial3 = &scif0;
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serial4 = &hscif2;
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serial5 = &scif5;
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serial6 = &scif4;
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ethernet0 = &avb;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 721>,
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<&versaclock5 1>,
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<&x302_clk>,
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<&versaclock5 2>;
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clock-names = "du.0", "du.1", "du.3",
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"dclkin.0", "dclkin.1", "dclkin.3";
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};
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/* Reference versaclock instead of audio_clk_a */
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&rcar_sound {
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clocks = <&cpg CPG_MOD 1005>,
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<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
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<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
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<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
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<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
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<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
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<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
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<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
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<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
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<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
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<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
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<&versaclock6_bb 4>, <&audio_clk_b>,
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<&audio_clk_c>,
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<&cpg CPG_CORE R8A774B1_CLK_S0D4>;
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};
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