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arm64: dts: rockchip: rk3399: quirk for extra long delay for dwc3 xHCI

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It has been reported that xHCI on this SoC really cannot
sleep without extraordinary delay. This quirk can ensure
the xHCI enter the Halted state after the Run/Stop (R/S)
bit is cleared to '0'.

Change-Id: Ibccf0c5c2da4533817b998b523e3a3a09ed7dcea
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This commit is contained in:
Wu Liang feng
2016-05-16 18:33:49 +08:00
committed by Tao Huang
parent b7489e9874
commit ef1eedc720
1 changed files with 2 additions and 0 deletions
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2
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -464,6 +464,7 @@
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
snps,xhci-slow-suspend-quirk;
power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};
@@ -495,6 +496,7 @@
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
snps,xhci-slow-suspend-quirk;
power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};