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serial: 8250_dw: set CPR 0x00023ff2 if it is 0

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The UART CPR may be 0 of some rockchip soc,
but it supports fifo and AFC, fifo entry is 32 default.

Change-Id: I44f420c556f703c2848c38dc8449546274ef887d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
This commit is contained in:
Huibin Hong
2017-12-28 16:17:21 +08:00
committed by Tao Huang
parent 243d0b8d2a
commit f18548643d
1 changed files with 12 additions and 0 deletions
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12
drivers/tty/serial/8250/8250_dw.c
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@@ -472,6 +472,15 @@ static void dw8250_setup_port(struct uart_port *p)
}
reg = dw8250_readl_ext(p, DW_UART_CPR);
#ifdef CONFIG_ARCH_ROCKCHIP
/*
* The UART CPR may be 0 of some rockchip soc,
* but it supports fifo and AFC, fifo entry is 32 default.
*/
if (reg == 0)
reg = 0x00023ff2;
#endif
if (!reg)
return;
@@ -480,6 +489,9 @@ static void dw8250_setup_port(struct uart_port *p)
p->type = PORT_16550A;
p->flags |= UPF_FIXED_TYPE;
p->fifosize = DW_UART_CPR_FIFO_SIZE(reg);
#ifdef CONFIG_ARCH_ROCKCHIP
up->tx_loadsz = p->fifosize * 3 / 4;
#endif
up->capabilities = UART_CAP_FIFO;
}