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Revert "sm1: emmc run hs200 busmode [1/1]"

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This reverts commit 3640f39081460f23efa0cf6db1d8fe19b9c6f96b.

Change-Id: If16a4473ac4d1973a83a6fed685688606ecee745
This commit is contained in:
Dongjin Kim
2019-04-26 13:02:07 +09:00
committed by Luke Go
parent 6ec8d5acf2
commit f27e74f627
2 changed files with 2 additions and 30 deletions
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26
drivers/amlogic/mmc/aml_sd_emmc.c
View File

@@ -3643,32 +3643,6 @@ static struct meson_mmc_data mmc_data_tl1 = {
.sdmmc.sdr104.core_phase = 2,
};
static struct meson_mmc_data mmc_data_sm1 = {
.chip_type = MMC_CHIP_SM1,
.port_a_base = 0xffe03000,
.port_b_base = 0xffe05000,
.port_c_base = 0xffe07000,
.pinmux_base = 0xff634400,
.clksrc_base = 0xff63c000,
.ds_pin_poll = 0x3a,
.ds_pin_poll_en = 0x48,
.ds_pin_poll_bit = 13,
.sdmmc.init.core_phase = 3,
.sdmmc.init.tx_phase = 0,
.sdmmc.init.rx_phase = 0,
.sdmmc.calc.core_phase = 0,
.sdmmc.calc.tx_phase = 2,
.sdmmc.hs.core_phase = 3,
.sdmmc.ddr.core_phase = 2,
.sdmmc.ddr.tx_phase = 0,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs2.tx_phase = 0,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.sd_hs.core_phase = 3,
.sdmmc.sdr104.core_phase = 2,
.sdmmc.sdr104.tx_phase = 0,
};
static const struct of_device_id meson_mmc_of_match[] = {
{
.compatible = "amlogic, meson-mmc-gxbb",

6
drivers/amlogic/mmc/aml_sd_emmc_v3.c
View File

@@ -1192,10 +1192,8 @@ tunning:
nmatch = aml_sd_emmc_tuning_transfer(mmc, opcode,
blk_pattern, host->blk_test, blksz);
if (nmatch != TUNING_NUM_PER_POINT) {
if (host->data->chip_type != MMC_CHIP_SM1) {
clkc->core_phase = para->hs2.tx_phase;
clkc->tx_phase = para->hs2.core_phase;
}
clkc->core_phase = para->hs2.tx_phase;
clkc->tx_phase = para->hs2.core_phase;
writel(vclk, host->base + SD_EMMC_CLOCK_V3);
pr_info("%s:try clock:0x%x>>>rx_tuning[%d] = %d\n",
mmc_hostname(host->mmc),