shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-09 04:10:18 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: rk3588: Add dcphy rx node

Browse Source 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ib00a670cb021125076eb0e3c8d81a456bed7becd
This commit is contained in:
Zefa Chen
2021-11-03 17:23:59 +08:00
committed by Tao Huang
parent ae17b4eb19
commit f50cc40593
1 changed files with 36 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -18,6 +18,8 @@
#size-cells = <2>;
aliases {
csi2dcphy0 = &csi2_dcphy0;
csi2dcphy1 = &csi2_dcphy1;
dsi0 = &dsi0;
dsi1 = &dsi1;
ethernet1 = &gmac1;
@@ -270,6 +272,18 @@
<&cpu_b0>, <&cpu_b1>, <&cpu_b2>, <&cpu_b3>;
};
csi2_dcphy0: csi2-dcphy0 {
compatible = "rockchip,rk3588-csi2-dcphy";
rockchip,hw = <&csi2_dcphy0_hw>;
status = "disabled";
};
csi2_dcphy1: csi2-dcphy1 {
compatible = "rockchip,rk3588-csi2-dcphy";
rockchip,hw = <&csi2_dcphy1_hw>;
status = "disabled";
};
display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vop_out>;
@@ -3823,6 +3837,17 @@
status = "disabled";
};
csi2_dcphy0_hw: csi2-dcphy0-hw@feda0000 {
compatible = "rockchip,rk3588-csi2-dcphy-hw";
reg = <0x0 0xfeda0000 0x0 0x10000>;
clocks = <&cru PCLK_MIPI_DCPHY0>;
clock-names = "pclk";
resets = <&cru SRST_S_MIPI_DCPHY0>;
reset-names = "phy";
rockchip,grf = <&mipidcphy0_grf>;
status = "disabled";
};
mipi_dcphy1: phy@fedb0000 {
compatible = "rockchip,rk3588-mipi-dcphy";
reg = <0x0 0xfedb0000 0x0 0x10000>;
@@ -3838,6 +3863,17 @@
status = "disabled";
};
csi2_dcphy1_hw: csi2-dcphy1-hw@fedb0000 {
compatible = "rockchip,rk3588-csi2-dcphy-hw";
reg = <0x0 0xfedb0000 0x0 0x10000>;
clocks = <&cru PCLK_MIPI_DCPHY1>;
clock-names = "pclk";
resets = <&cru SRST_S_MIPI_DCPHY1>;
reset-names = "phy";
rockchip,grf = <&mipidcphy1_grf>;
status = "disabled";
};
combphy0_ps: phy@fee00000 {
compatible = "rockchip,rk3588-naneng-combphy";
reg = <0x0 0xfee00000 0x0 0x100>;