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arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy

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Change-Id: I906b8a3e483f6db790701a10d6a0aa71080948bc
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2025-04-25 12:19:26 +08:00
committed by Tao Huang
parent 185b03cb0d
commit f58cc2736a
3 changed files with 3 additions and 3 deletions
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2
arch/arm64/boot/dts/rockchip/rv1126b-evb1-v10.dtsi
View File

@@ -325,7 +325,7 @@
compatible = "ethernet-phy-id0680.8101", "ethernet-phy-ieee802.3-c22";
reg = <2>;
clocks = <&cru CLK_MACPHY>;
clock-frequency = <50000000>;
clock-frequency = <24000000>;
resets = <&cru SRST_RESETN_MACPHY>;
pinctrl-names = "default";
pinctrl-0 = <&fephym1_pins>;

2
arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts
View File

@@ -320,7 +320,7 @@
compatible = "ethernet-phy-id0680.8101", "ethernet-phy-ieee802.3-c22";
reg = <2>;
clocks = <&cru CLK_MACPHY>;
clock-frequency = <50000000>;
clock-frequency = <24000000>;
resets = <&cru SRST_RESETN_MACPHY>;
pinctrl-names = "default";
pinctrl-0 = <&fephym2_pins>;

2
arch/arm64/boot/dts/rockchip/rv1126b-iotest-v10.dts
View File

@@ -129,7 +129,7 @@
compatible = "ethernet-phy-id0680.8101", "ethernet-phy-ieee802.3-c22";
reg = <2>;
clocks = <&cru CLK_MACPHY>;
clock-frequency = <50000000>;
clock-frequency = <24000000>;
resets = <&cru SRST_RESETN_MACPHY>;
phy-is-integrated;
};