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arm64: dts: rockchip: rk3568: setting npll to 1.2G when clk init

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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: If088d432552d186866dd53211c5a2126870f62a4
This commit is contained in:
Elaine Zhang
2020-11-11 14:25:03 +08:00
committed by Tao Huang
parent 75f941d347
commit f807c08d2b
1 changed files with 4 additions and 2 deletions
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6
arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -541,7 +541,8 @@
<&cru ACLK_BUS>, <&cru PCLK_BUS>,
<&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>,
<&cru HCLK_TOP>, <&cru PCLK_TOP>,
<&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>;
<&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>,
<&cru PLL_NPLL>;
assigned-clock-rates =
<32768>, <100000000>,
<100000000>, <1000000000>,
@@ -549,7 +550,8 @@
<150000000>, <100000000>,
<300000000>, <200000000>,
<150000000>, <100000000>,
<300000000>, <150000000>;
<300000000>, <150000000>,
<1200000000>;
assigned-clock-parents =
<&pmucru CLK_RTC32K_FRAC>;
};