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drm/bridge: synopsys: dw-hdmi-qp: Set color depth and phase to 0 when 24-bit format

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According to CTS requirements, CD field and PP field in GCP
should be set to zero when 24-bit output.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Icf79493d5531a9781f9b6b8c656b297eec98f7b0
This commit is contained in:
Algea Cao
2022-07-22 10:29:37 +08:00
committed by Tao Huang
parent 14755141c9
commit fbe1b004fa
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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@@ -95,7 +95,7 @@
#define RK3588_YUV420 0x3
#define RK3588_COMPRESSED_DATA 0xb
#define RK3588_COLOR_DEPTH_MASK (0xf << 4)
#define RK3588_8BPC (0x5 << 4)
#define RK3588_8BPC 0
#define RK3588_10BPC (0x6 << 4)
#define RK3588_CECIN_MASK BIT(8)
#define RK3588_SCLIN_MASK BIT(9)