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tvafe: add pq reg trust list protection [1/1]
PD#SWPL-12475 Problem: sometimes pq reg wrong value will cause tvafe working abnormal Solution: add pq reg trust list protection Verify: x301 Change-Id: Ie498fec7a890c8eb2f4a7af660cef70c8da247dd Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
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@@ -235,6 +235,76 @@ static const unsigned int cvbs_top_reg_default[][2] = {
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{0xFFFFFFFF, 0x00000000,}
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};
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static const unsigned int tvafe_pq_reg_trust_table[][2] = {
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/* reg mask */
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{CVD2_CONTROL1, 0xff}, /* 0x01 */
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{CVD2_OUTPUT_CONTROL, 0x0f}, /* 0x07 */
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{CVD2_LUMA_CONTRAST_ADJUSTMENT, 0xff}, /* 0x08 */
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{CVD2_LUMA_BRIGHTNESS_ADJUSTMENT, 0xff}, /* 0x09 */
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{CVD2_CHROMA_SATURATION_ADJUSTMENT, 0xff}, /* 0x0a */
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{CVD2_CHROMA_HUE_PHASE_ADJUSTMENT, 0xff}, /* 0x0b */
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{CVD2_CHROMA_EDGE_ENHANCEMENT, 0xff}, /* 0xb5 */
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{CVD2_CHROMA_BW_MOTION, 0xff}, /* 0xe8 */
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{CVD2_REG_FA, 0xa0}, /* 0xfa */
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{ACD_REG_25, 0xffffffff},
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{ACD_REG_53, 0xffffffff},
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{ACD_REG_54, 0xffffffff},
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{ACD_REG_55, 0xc0fff3ff},
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{ACD_REG_56, 0x00f00000},
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{ACD_REG_57, 0x03ff81ff},
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{ACD_REG_58, 0x8fffffff},
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{ACD_REG_64, 0xffffffff},
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{ACD_REG_65, 0xffffffff},
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{ACD_REG_66, 0x80000ff0},
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{ACD_REG_86, 0xc0000000},
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{ACD_REG_89, 0x803ff3ff},
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{ACD_REG_8A, 0x03ff1fff},
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{ACD_REG_8B, 0x0fffffff},
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{ACD_REG_8C, 0x0fffffff},
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{0xffffffff, 0x00000000}, /* ending */
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};
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static void tvafe_pq_apb_reg_trust_write(unsigned int addr,
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unsigned int mask, unsigned int val)
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{
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unsigned int reg, i = 0, size;
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reg = (addr << 2);
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size = sizeof(tvafe_pq_reg_trust_table) / (sizeof(unsigned int) * 2);
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/* check reg trust */
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while (i < size) {
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if (tvafe_pq_reg_trust_table[i][0] == 0xFFFFFFFF) {
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tvafe_pr_info("%s: error: reg 0x%x is out of trust reg!\n",
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__func__, addr);
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return;
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}
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if (reg == tvafe_pq_reg_trust_table[i][0])
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break;
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i++;
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}
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/* check mask trust */
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if ((mask & tvafe_pq_reg_trust_table[i][1]) != mask) {
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tvafe_pr_info("%s: warning: reg 0x%x mask 0x%x is out of trust mask 0x%x, change to 0x%x!\n",
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__func__, addr, mask,
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tvafe_pq_reg_trust_table[i][1],
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(mask & tvafe_pq_reg_trust_table[i][1]));
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mask &= tvafe_pq_reg_trust_table[i][1];
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}
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if (mask == 0xffffffff)
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W_APB_REG(reg, val);
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else
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W_APB_REG(reg, (R_APB_REG(reg) & (~(mask))) | (val & mask));
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if (tvafe_dbg_print & TVAFE_DBG_NORMAL)
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tvafe_pr_info("%s: apb: Reg0x%x(%u)=0x%x(%u) val=%x(%u) mask=%x(%u)\n",
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__func__, addr, addr,
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(val & mask), (val & mask),
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val, val, mask, mask);
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}
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/*
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* tvafe cvd2 video poaition reg setting
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*/
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@@ -347,20 +417,8 @@ for (i = 0; i < p->length; i++) {
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p->am_reg[i].mask, p->am_reg[i].mask);
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break;
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case REG_TYPE_APB:
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if (p->am_reg[i].mask == 0xffffffff)
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W_APB_REG(p->am_reg[i].addr<<2, p->am_reg[i].val);
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else
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W_APB_REG(p->am_reg[i].addr<<2,
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(R_APB_REG(p->am_reg[i].addr<<2) &
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(~(p->am_reg[i].mask))) |
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(p->am_reg[i].val & p->am_reg[i].mask));
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if (tvafe_dbg_print & TVAFE_DBG_NORMAL)
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tvafe_pr_info("%s: apb: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n",
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__func__, p->am_reg[i].addr, p->am_reg[i].addr,
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(p->am_reg[i].val & p->am_reg[i].mask),
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(p->am_reg[i].val & p->am_reg[i].mask),
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p->am_reg[i].val, p->am_reg[i].val,
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p->am_reg[i].mask, p->am_reg[i].mask);
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tvafe_pq_apb_reg_trust_write(p->am_reg[i].addr,
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p->am_reg[i].mask, p->am_reg[i].val);
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break;
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default:
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if (tvafe_dbg_print & TVAFE_DBG_NORMAL)
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