clk: update gpu clk node [1/3]

PD#152220: update gpu clk node

Change-Id: I77796b9db66a24466211380432700bbaf50ac1d7
Signed-off-by: Jiyu Yang <Jiyu.Yang@amlogic.com>
This commit is contained in:
Jiyu Yang
2017-09-18 16:22:56 +08:00
committed by Jianxin Pan
parent a998ca2c01
commit fcbaeafc5e
3 changed files with 11 additions and 11 deletions

View File

@@ -62,9 +62,9 @@
};
clk285_cfg:clk285_cfg {
clk_freq = <285000000>;
clk_freq = <285714285>;
clk_parent = "fclk_div7";
clkp_freq = <285000000>;
clkp_freq = <285714285>;
voltage = <1150>;
keep_count = <5>;
threshold = <100 250>;
@@ -92,9 +92,9 @@
};
clk666_cfg:clk666_cfg {
clk_freq = <666000000>;
clk_freq = <666666666>;
clk_parent = "fclk_div3";
clkp_freq = <666000000>;
clkp_freq = <666666666>;
voltage = <1150>;
keep_count = <1>;
threshold = <177 250>;

View File

@@ -62,9 +62,9 @@
};
dvfs285_cfg:dvfs285_cfg {
clk_freq = <285714000>;
clk_freq = <285714285>;
clk_parent = "fclk_div7";
clkp_freq = <285714000>;
clkp_freq = <285714285>;
voltage = <1150>;
keep_count = <5>;
threshold = <100 190>;
@@ -89,9 +89,9 @@
};
dvfs666_cfg:dvfs666_cfg {
clk_freq = <666000000>;
clk_freq = <666666666>;
clk_parent = "fclk_div3";
clkp_freq = <666000000>;
clkp_freq = <666666666>;
voltage = <1150>;
keep_count = <5>;
threshold = <210 236>;

View File

@@ -64,7 +64,7 @@
dvfs285_cfg:dvfs285_cfg {
clk_freq = <285714000>;
clk_parent = "fclk_div7";
clkp_freq = <285714000>;
clkp_freq = <285714285>;
voltage = <1150>;
keep_count = <5>;
threshold = <100 190>;
@@ -89,9 +89,9 @@
};
dvfs666_cfg:dvfs666_cfg {
clk_freq = <666000000>;
clk_freq = <666666666>;
clk_parent = "fclk_div3";
clkp_freq = <666000000>;
clkp_freq = <666666666>;
voltage = <1150>;
keep_count = <5>;
threshold = <210 236>;