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phy/rockchip: Add driver for Rockchip Naneng eDP Transmitter PHY

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DPTPHYT22ULP is designed for chips that perform eDP/DP data
communication while operating at low power consumption.
The main link is a multi-gigabit transmitter macro which
enable speed up to 4.0Gbps data transmitter with optimized
power and die size, also it can be easily fabricated and
implemented in a video system. The AUX channel is a halfduplex,
bidirectional channel consisting of one differential pair,
supporting the bit rate of about 1Mbps.

Macro consists of multi-main link transmitter channels,
AUX channel, one PLL and bias-gen unit. The main link
transmitter performs dedicated P2S, clock generator,
driver with preemphasis and self-test. Each of the channels
can be turned off individually.

Change-Id: Idf58991ff1bdd4557c4cfadf2dc047e95eca7668
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2020-09-16 16:36:06 +08:00
committed by Tao Huang
parent 346f10249a
commit fd54e4d301
2 changed files with 8 additions and 0 deletions
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7
drivers/phy/rockchip/Kconfig
View File

@@ -80,6 +80,13 @@ config PHY_ROCKCHIP_NANENG_COMBO_PHY
Enable this to support the Rockchip PCIe/USB3.0/SATA/QSGMII
combo PHY with NaNeng IP block.
config PHY_ROCKCHIP_NANENG_EDP
tristate "Rockchip Naneng eDP Transmitter PHY driver"
depends on ARCH_ROCKCHIP && OF
select GENERIC_PHY
help
Support for Rockchip eDP Transmitter PHY with Naneng IP block.
config PHY_ROCKCHIP_NANENG_USB2
tristate "Rockchip NANENG USB2PHY Driver"
depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF

1
drivers/phy/rockchip/Makefile
View File

@@ -8,6 +8,7 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o
obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY) += phy-rockchip-naneng-combphy.o
obj-$(CONFIG_PHY_ROCKCHIP_NANENG_EDP) += phy-rockchip-naneng-edp.o
obj-$(CONFIG_PHY_ROCKCHIP_NANENG_USB2) += phy-rockchip-naneng-usb2.o
obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o
obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o