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Merge commit 'e3772da5fa567cc139cb8215f83887383aac58ad'

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* commit 'e3772da5fa567cc139cb8215f83887383aac58ad':
  ARM: dts: rockchip: rk3126c-evb-ddr3-v10-linux: fixed ldo5 regulator err
  media: rockchip: vpss: online support tile write
  media: rockchip: isp: fix isp39 no output
  drm/rockchip: vop2: add reset vp->win_mask
  ASoC: rk817: fix no sound when capture by tinycap or arecord

Change-Id: I7bb325fae6500ccb5b1879248ea1ba3b8a265862
This commit is contained in:
Tao Huang
2024-10-23 19:42:50 +08:00
parent bcc12a2c4a e3772da5fa
commit fdb77bf3b7
6 changed files with 196 additions and 12 deletions
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8
arch/arm/boot/dts/rk3126c-evb-ddr3-v10-linux.dts
View File

@@ -128,6 +128,13 @@
#clock-cells = <0>;
};
/* This node is useless for RK3126C EVB without bluetooth.
* It's just for compatibility with SDK script checks.
*/
wireless-bluetooth {
status = "disabled";
};
wireless-wlan {
compatible = "wlan-platdata";
power_ctrl_by_pmu;
@@ -719,7 +726,6 @@
regulator-name= "ldo5";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};

4
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View File

@@ -4154,6 +4154,10 @@ static void vop3_layer_map_initial(struct vop2 *vop2, uint32_t current_vp_id)
{
uint16_t vp_id;
struct drm_plane *plane = NULL;
int i = 0;
for (i = 0; i < vop2->data->nr_vps; i++)
vop2->vps[i].win_mask = 0;
drm_for_each_plane(plane, vop2->drm_dev) {
struct vop2_win *win = to_vop2_win(plane);

3
drivers/media/platform/rockchip/isp/hw.c
View File

@@ -1068,6 +1068,9 @@ static void isp_config_clk(struct rkisp_hw_dev *dev, int on)
if ((dev->isp_ver == ISP_V20 || dev->isp_ver == ISP_V30) && on)
val |= CLK_CTRL_ISP_3A | CLK_CTRL_ISP_RAW;
/* fix mi and scale on-off no output for isp39 */
if (dev->isp_ver == ISP_V39 && on)
val |= ISP3X_CLK_RSZM | ISP3X_CLK_RSZS;
if (dev->isp_ver == ISP_V32)
rv1106_sdmmc_get_lock();
writel(val, dev->base_addr + CTRL_VI_ISP_CLK_CTRL);

4
drivers/media/platform/rockchip/isp/regs_v3x.h
View File

@@ -2390,6 +2390,10 @@
/* VI_ICCL */
#define ISP32_BRSZ_CLK_ENABLE BIT(13)
/* VI_ISP_CLK_CTRL */
#define ISP3X_CLK_RSZM BIT(26)
#define ISP3X_CLK_RSZS BIT(29)
/* SWS_CFG */
#define ISP32L_ISP2ENC_CNT_MUX BIT(0)
#define ISP3X_SW_ACK_FRM_PRO_DIS BIT(3)

182
drivers/media/platform/rockchip/vpss/stream.c
View File

@@ -25,7 +25,7 @@ static int rkvpss_stream_crop(struct rkvpss_stream *stream, bool on, bool sync);
static int rkvpss_stream_scale(struct rkvpss_stream *stream, bool on, bool sync);
static void rkvpss_stream_mf(struct rkvpss_stream *stream);
static const struct capture_fmt scl_fmts[] = {
static const struct capture_fmt scl0_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV16,
.fmt_type = FMT_YUV,
@@ -89,6 +89,24 @@ static const struct capture_fmt scl_fmts[] = {
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_422P,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}, {
.fourcc = V4L2_PIX_FMT_TILE420,
.fmt_type = FMT_YUV,
.bpp = { 24 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = 0,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV420,
}, {
.fourcc = V4L2_PIX_FMT_TILE422,
.fmt_type = FMT_YUV,
.bpp = { 32 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = 0,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}
};
@@ -210,12 +228,98 @@ static const struct capture_fmt scl1_fmts[] = {
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_422P,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}, {
.fourcc = V4L2_PIX_FMT_TILE420,
.fmt_type = FMT_YUV,
.bpp = { 24 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = 0,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV420,
}, {
.fourcc = V4L2_PIX_FMT_TILE422,
.fmt_type = FMT_YUV,
.bpp = { 32 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = 0,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}
};
static const struct capture_fmt scl2_3_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV16,
.fmt_type = FMT_YUV,
.bpp = { 8, 16 },
.cplanes = 2,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_42XSP,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}, {
.fourcc = V4L2_PIX_FMT_NV12,
.fmt_type = FMT_YUV,
.bpp = { 8, 16 },
.cplanes = 2,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_42XSP,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV420,
}, {
.fourcc = V4L2_PIX_FMT_GREY,
.fmt_type = FMT_YUV,
.bpp = { 8 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_42XSP,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV400,
}, {
.fourcc = V4L2_PIX_FMT_UYVY,
.fmt_type = FMT_YUV,
.bpp = { 16 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_422P,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}, {
.fourcc = V4L2_PIX_FMT_NV61,
.fmt_type = FMT_YUV,
.bpp = { 8, 16 },
.cplanes = 2,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_42XSP,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}, {
.fourcc = V4L2_PIX_FMT_NV21,
.fmt_type = FMT_YUV,
.bpp = { 8, 16 },
.cplanes = 2,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_42XSP,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV420,
}, {
.fourcc = V4L2_PIX_FMT_VYUY,
.fmt_type = FMT_YUV,
.bpp = { 16 },
.cplanes = 1,
.mplanes = 1,
.swap = 0,
.wr_fmt = RKVPSS_MI_CHN_WR_422P,
.output_fmt = RKVPSS_MI_CHN_WR_OUTPUT_YUV422,
}
};
static struct stream_config scl0_config = {
.fmts = scl_fmts,
.fmt_size = ARRAY_SIZE(scl_fmts),
.fmts = scl0_fmts,
.fmt_size = ARRAY_SIZE(scl0_fmts),
.frame_end_id = RKVPSS_MI_CHN0_FRM_END,
.crop = {
.ctrl = RKVPSS_CROP1_CTRL,
@@ -319,8 +423,8 @@ static struct stream_config scl1_config = {
};
static struct stream_config scl2_config = {
.fmts = scl_fmts,
.fmt_size = ARRAY_SIZE(scl_fmts),
.fmts = scl2_3_fmts,
.fmt_size = ARRAY_SIZE(scl2_3_fmts),
.frame_end_id = RKVPSS_MI_CHN2_FRM_END,
.crop = {
.ctrl = RKVPSS_CROP1_CTRL,
@@ -389,8 +493,8 @@ static struct stream_config scl2_config = {
};
static struct stream_config scl3_config = {
.fmts = scl_fmts,
.fmt_size = ARRAY_SIZE(scl_fmts),
.fmts = scl2_3_fmts,
.fmt_size = ARRAY_SIZE(scl2_3_fmts),
.frame_end_id = RKVPSS_MI_CHN3_FRM_END,
.crop = {
.ctrl = RKVPSS_CROP1_CTRL,
@@ -689,6 +793,15 @@ static void scl_config_mi(struct rkvpss_stream *stream)
mask = RKVPSS_MI_WR_UV_SWAP;
val = RKVPSS_MI_WR_UV_SWAP;
rkvpss_hw_set_bits(dev->hw_dev, RKVPSS_MI_WR_CTRL, mask, val);
break;
case V4L2_PIX_FMT_TILE420:
case V4L2_PIX_FMT_TILE422:
mask = RKVPSS_MI_WR_TILE_SEL(3);
val = RKVPSS_MI_WR_TILE_SEL(stream->id + 1);
rkvpss_hw_set_bits(dev->hw_dev, RKVPSS_MI_WR_CTRL, mask, val);
break;
default:
break;
}
stream->is_mf_upd = true;
@@ -1775,6 +1888,28 @@ static int rkvpss_set_fmt(struct rkvpss_stream *stream,
return -EINVAL;
}
/* Tile4x4 writing of Channel0 and Channel1 only supports either one.*/
if (fmt->fourcc == V4L2_PIX_FMT_TILE420 || fmt->fourcc == V4L2_PIX_FMT_TILE422) {
if (stream->id == 0) {
if (dev->stream_vdev.stream[1].streaming &&
(dev->stream_vdev.stream[1].out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE420 ||
dev->stream_vdev.stream[1].out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE422)) {
v4l2_err(&dev->v4l2_dev,
"Tile4x4 writing of Ch0 and Cl1 only supports either one\n");
return -EINVAL;
}
}
if (stream->id == 1) {
if (dev->stream_vdev.stream[0].streaming &&
(dev->stream_vdev.stream[0].out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE420 ||
dev->stream_vdev.stream[0].out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE422)) {
v4l2_err(&dev->v4l2_dev,
"Tile4x4 writing of Ch0 and Cl1 only supports either one\n");
return -EINVAL;
}
}
}
pixm->num_planes = fmt->mplanes;
pixm->field = V4L2_FIELD_NONE;
if (!pixm->quantization)
@@ -1790,10 +1925,20 @@ static int rkvpss_set_fmt(struct rkvpss_stream *stream,
h = pixm->height;
width = i ? w / xsubs : w;
height = i ? h / ysubs : h;
bytesperline = width * DIV_ROUND_UP(fmt->bpp[i], 8);
if (fmt->fourcc == V4L2_PIX_FMT_TILE420 || fmt->fourcc == V4L2_PIX_FMT_TILE422)
bytesperline = ALIGN(((width / 4) * fmt->bpp[i]), 16);
else
bytesperline = width * DIV_ROUND_UP(fmt->bpp[i], 8);
if (i != 0 || plane_fmt->bytesperline < bytesperline)
plane_fmt->bytesperline = bytesperline;
plane_fmt->sizeimage = plane_fmt->bytesperline * height;
if (fmt->fourcc == V4L2_PIX_FMT_TILE420 || fmt->fourcc == V4L2_PIX_FMT_TILE422)
plane_fmt->sizeimage = plane_fmt->bytesperline * (height / 4);
else
plane_fmt->sizeimage = plane_fmt->bytesperline * height;
imagsize += plane_fmt->sizeimage;
}
if (fmt->mplanes == 1)
@@ -1886,6 +2031,21 @@ static int rkvpss_enum_fmt_vid_mplane(struct file *file, void *priv,
fmt = &stream->config->fmts[f->index];
f->pixelformat = fmt->fourcc;
switch (f->pixelformat) {
case V4L2_PIX_FMT_TILE420:
strscpy(f->description,
"Rockchip yuv420 tile",
sizeof(f->description));
break;
case V4L2_PIX_FMT_TILE422:
strscpy(f->description,
"Rockchip yuv422 tile",
sizeof(f->description));
break;
default:
break;
}
return 0;
}
@@ -1998,6 +2158,10 @@ static void rkvpss_stream_mf(struct rkvpss_stream *stream)
rkvpss_unite_set_bits(dev, RKVPSS_VPSS_CTRL, mask, val);
}
mask = RKVPSS_MI_CHN_V_FLIP(stream->id);
/* Tile4x4 writing can't flip*/
if (stream->out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE420 ||
stream->out_cap_fmt.fourcc == V4L2_PIX_FMT_TILE422)
stream->flip_en = false;
val = stream->flip_en ? mask : 0;
rkvpss_unite_set_bits(dev, RKVPSS_MI_WR_VFLIP_CTRL, mask, val);
}

7
sound/soc/codecs/rk817_codec.c
View File

@@ -1239,12 +1239,15 @@ static int rk817_digital_mute_adc(struct snd_soc_dai *dai, int mute, int stream)
{
struct snd_soc_component *component = dai->component;
if (mute)
if (mute) {
snd_soc_component_update_bits(component, RK817_CODEC_DTOP_DIGEN_CLKE,
I2STX_EN_MASK, I2STX_DIS);
else
} else {
snd_soc_component_update_bits(component, RK817_CODEC_DTOP_DIGEN_CLKE,
I2STX_EN_MASK, I2STX_EN);
snd_soc_component_update_bits(component, RK817_CODEC_DTOP_DIGEN_CLKE,
I2STX_CKE_EN, I2STX_CKE_EN);
}
return 0;
}