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ARM: dts: rockchip: rv1106-uvc: Enable clk compensation for i2s0

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Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I4e87859483fe4494a4e3dc2336e89b9ef9ea65da
This commit is contained in:
Huang zhibao
2022-07-22 08:58:53 +08:00
committed by Tao Huang
parent ad597f1114
commit fecf3d2a6c
1 changed files with 7 additions and 0 deletions
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7
arch/arm/boot/dts/rv1106-uvc.dtsi
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@@ -41,6 +41,13 @@
&i2s0_8ch {
status = "okay";
clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0>,
<&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>,
<&cru PLL_GPLL>, <&cru PLL_GPLL>;
clock-names = "mclk_tx", "mclk_rx", "hclk",
"mclk_tx_src", "mclk_rx_src",
"mclk_root0", "mclk_root1";
rockchip,mclk-calibrate;
};
&mpp_srv {