Commit Graph

302253 Commits

Author SHA1 Message Date
David Wu
00a00a1ff0 iio: adc: rockchip_saradc: add saradc support for rk3399
Change-Id: I1d60583f02cc4b4cac8a8a1c1fb22bfeb5e52647
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-16 14:06:50 +08:00
xiaoyao
2f9c9cd46e net: rkwifi: Modify driver loading way to reduce boot time
Change-Id: Ie569aeedb5544cb0131ab48818db6a5b0dde05bb
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-16 11:17:22 +08:00
Zhaoyifeng
3cbba607a8 ARM64: nand: update nand drvier for 3366
Change-Id: I96ff59f331591807f8d5b009c933a6c71f62a93b
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
2016-03-15 18:56:30 +08:00
Xing Zheng
85e725256d UPSTREAM: clk: rockchip: add new pll-type for rk3399 and similar socs
The rk3399's pll and clock are similar with rk3036's, it different
with base on the rk3066(rk3188, rk3288, rk3368 use it), there are
different adjust foctors and control registers, so these should be
independent and separate from the series of rk3066s.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit 95e0c473a0ac1bdac25f55678dc602eb50dae684)

Change-Id: I77872b5fb33eb92402e9036b97b185ea56eb45c6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:51:57 +08:00
Shawn Lin
6e7ff899c2 UPSTREAM: clk: rockchip: release io resource when failing to init clk
We should call iounmap to relase reg_base since it's not going
to be used any more if failing to init clk.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit 86609a6613c64ee9272da1fd2f578d4beab2174e)

Conflicts:

	drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, and apply this patch for
clk-rk3366 manually.]

Change-Id: I2d73c90eb6f43150725c81417af37a6a562cd329
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:49:31 +08:00
Shawn Lin
d73b398d05 UPSTREAM: clk: rockchip: remove redundant checking of device_node
rockchip_clk_of_add_provider is used by sub-clk driver which
already call of_iomap before calling it. If device_node does
not exist, of_iomap returns NULL which will fail to init the
sub-clk driver. So really it's redundant.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit a96edf5a5243e1bdf642492b783221aa498f1e49)

Change-Id: I9a51ed269fe26742da2ae84d99cf9689f49add1b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:48:56 +08:00
Shawn Lin
fbb233e6fa UPSTREAM: clk: rockchip: fix warning reported by kernel-doc
./scripts/kernel-doc -man -v drivers/clk/rockchip/clk.h > /dev/null

drivers/clk/rockchip/clk.h:133: warning: missing initial short
description on line:
 * struct rockchip_clk_provider: information about clock provider
drivers/clk/rockchip/clk.h:133: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:164: warning: missing initial short
description on line:
 * struct rockchip_pll_clock: information about pll clock
drivers/clk/rockchip/clk.h:164: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'parent_names'
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'num_parents'
drivers/clk/rockchip/clk.h:194: warning: Excess struct/union/enum/typedef
member 'parent_name' description in 'rockchip_pll_clock'
drivers/clk/rockchip/clk.h:235: warning: missing initial short
description on line:
 * struct rockchip_cpuclk_reg_data: describes register offsets and
masks of the cpuclock

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit 1c908b320055e1ce706e91121dbb2ce7934c788f)

Change-Id: I18dbd45ebd528fe2a871c98a1561dd0c0bf41e13
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:48:21 +08:00
Shawn Lin
b270437e9d UPSTREAM: clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data
mux_core_reg isn't been used anywhere, let's remove it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit 72478f190fec9f2358b62f32ce5e27e6f323fa53)

Change-Id: Ib6d8ee5bca61d1ada6215660862d2d728927a948
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:47:44 +08:00
Xing Zheng
f7bb23aecf UPSTREAM: clk: rockchip: Add support for multiple clock providers
There are need to support Multi-CRUs probability in future, but
it is not supported on the current Rockchip Clock Framework.

Therefore, this patch add support a provider as the parameter
handler when we call the clock register functions for per CRU.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit d509ddf2e57c99ae760d1a289b85f1e0d729f864)

Conflicts:

	drivers/clk/rockchip/clk-rk3036.c
	drivers/clk/rockchip/clk-rk3188.c
	drivers/clk/rockchip/clk-rk3228.c
	drivers/clk/rockchip/clk-rk3366.c
[zx: keep calling clk_register_fixed_factor previouslly, and there
is no rk3228 clock controller, add support for clk-rk3366 manually,
because it is not in the upstream codes.]

Change-Id: I94976f38fb6edd88f334479d6e44fef5bcdfc16a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:46:48 +08:00
Xing Zheng
35bba3204b UPSTREAM: clk: rockchip: allow varying mux parameters for cpuclk pll-sources
Thers are only two parent PLLs that APLL and GPLL for core on the
previous SoCs (RK3066/RK3188/RK3288/RK3368). Hence, we set fixed
GPLL as alternate parent when core is switching freq.

Since RK3399 big.LITTLE architecture, we need to select and adapt
more PLLs (ALPLL/ABPLL/DPLL/GPLL) sources.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next
 commit 0fda2be634398f4b8d53c0436311f99557e56c4e)

Conflicts:

	drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, apply this patch for 
clk-rk3366.]

Change-Id: I48fde9facccd41585873c997b0b02a7a73972717
2016-03-15 17:24:38 +08:00
Heiko Stuebner
9f11b885e1 UPSTREAM: clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
As commit 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.

The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.

Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.

This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.

For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.

With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.

Fixes: 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
(cherry picked from commit dfff24bde7)

Conflicts:

	drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, apply for clk-rk3366]

Change-Id: I2e91afd893c87eb3ab8a41db1fe81f5c43409951
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:21:33 +08:00
Chris Zhong
f0df56476f UPSTREAM: clk: rockchip: switch PLLs to slow mode before reboot for rk3288
We've been seeing some crashes at reboot test on rk3288-based systems,
which boards have not reset pin connected to NPOR, they reboot by
setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in
a high frequency mode, some IPs might hang during soft reset.
It appears that we can fix the problem by switching to slow mode before
reboot, just like what we did before suspend.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 1d33929e2a)

Change-Id: Ic01f80e6f33ae84cc87e954aae35f26b6f1a5434
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:20:14 +08:00
Frank Wang
bf011cb752 phy: rockchip-usb: support InnoSilicon usb2.0 phy
For InnoSilicon usb2.0 phy, there is no siddq bit for operating,
what is more, when we control usb phy to suspend, its Plls will
not be affected. So we can operate resume/suspend bits directly
when it is going to power on/off.

Change-Id: I6bfe6b1a90b1bdcb0b0d5b670d579a625b22c0ba
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2016-03-15 16:59:43 +08:00
Xing Zheng
331fd8c032 UPSTREAM: clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
Because there are some frac clock mux nodes don't have a gate node on
the RK3399.

Change-Id: I4791b90a08faab286743a5cba30738cfb046594c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next
 commit ffd9d4d39ef7ff90364d3abd6c39919e6582b605)
2016-03-14 15:45:56 +08:00
Feng Xiao
e69848b3a5 clk: rockchip: add clock ids for mpll_src and 32k on RK3366
Set the newly added id for mpll_src and 32k, so that they can be called
in other parts.

Change-Id: Ief82231215a147b62abcfbb5565054470fc9ea37
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-14 15:40:06 +08:00
Huang Jiachai
d4a6147e3d video: rockchip: lcdc: 3366: add support power domain control
Change-Id: Ibb9d15e6e2a84a1847f4cfbbc8e75bca54e1782b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-14 11:04:58 +08:00
Huang Jiachai
0a49e8e7c0 video: rockchip: lcdc: 3366: update for CABC
Change-Id: I75fd4deb02f3f131a7258f5529a8cb68fb55dca6
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-11 14:11:18 +08:00
Huibin Hong
2c1485536d UPSTREAM: spi/rockchip: Make sure spi clk is on in rockchip_spi_set_cs
Rockchip_spi_set_cs could be called by spi_setup, but
spi_setup may be called by device driver after runtime suspend.
Then the spi clock is closed, rockchip_spi_set_cs may access the
spi registers, which causes cpu block in some socs.

Change-Id: I58915aee30cfbd3098eb137e3d9046b59ad9476c
Fixes: 64e36824b3 ("spi/rockchip: add driver for Rockchip RK3xxx")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
 commit b920cc3191)
2016-03-11 12:12:46 +08:00
Xu Jianqun
d27a992f2e UPSTREAM: spi: rockchip: add bindings for rk3399 spi
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.

Change-Id: Ib43ec4ce8970359f660311fce35017843f8998df
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
 commit 9b7a562215)
2016-03-11 12:00:16 +08:00
Huang Jiachai
6fa79f50a9 video: rockchip: lcdc: 3366: fix timing reg take effect time
rk3366 timing reg config change to frame effect,
so we need config done after update timing.

Change-Id: I7279fc03a066357cb8a0ed452e9182f92bf90f01
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-10 19:39:08 +08:00
Huang Jiachai
4222a78712 video: rockchip: fb: update for extend vop fb info
like rk3366 vop0 is different from vop1, so fb[rk_fb->num_fb >> 1]
is not correct for extend vop fb info.

Change-Id: Ie7ed0614a5cb32fcb22707c88aa70be45cb243d7
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-10 18:30:51 +08:00
CMY
1dea5fb1c2 lowmemorykiller: calculator free pages exclude CMA's free
Change-Id: I51a08cd9c9ef8d37fd0a5f649c5d2843a8b7d9ff
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-03-10 14:43:42 +08:00
Feng Xiao
b3a7f415a1 clk: rockchip: add clock ids for isp of RK3366 SoCs
Change-Id: Ia1c1ef34eebcaa8f29d537b291c45654252444b8
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-10 14:40:58 +08:00
Huang, Tao
c61cf05de3 video: rockchip: reorder config
Change-Id: Ie9e0f2e8a69c456f52003dd3f956ff0a44b981cd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-10 11:36:17 +08:00
Huang, Tao
f2b7d4dfd8 video: rockchip: iep: do not default enable
Change-Id: I48747ec133f05ec6b1fa6d70187c4c641fed7ccd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-10 11:19:07 +08:00
sayon.chen
0e6af837fe video: rockchip: vcodec: add vpu codec drivers
move vpu codec code to drivers/video/rockchip

Change-Id: Idf4100181200cf28a18990da7088bee495f10fcb
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 10:26:04 +08:00
xiaoyao
b01b93bf4e mmc: sdio: call mmc_power_cycle before re-init sdio devices
Change-Id: I4ae9bb385c9235eb184de0f3bf06719b056f4842
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 19:46:47 +08:00
Feng Xiao
123d41d1dd clk: rockchip: add video noc clk to the list of rk3366 critical clocks
The clocks of VPU NOC and RKVEDC NOC interact with each other.
If one of VPU and RKVDEC is working, they all must be opened.

Change-Id: I966df107ae72fbbb99f1e660a79bfd07476e8539
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-09 19:04:06 +08:00
sayon.chen
23e9578703 video: rockchip: iep: iep code modify
fix iep code compile fail in kernel-4.4

Change-Id: Iba105baecff5fe474cd0d9c02dc9b7970e9c9990
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-09 18:41:34 +08:00
chenzhen
e7438c1518 MALI: add midgard src dir
Change-Id: I9938fe0377fc57e030c9e5109c216d6c62dbeef0
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 16:51:03 +08:00
chenzhen
2b339dd153 MALI: rockchip: not to use sg_dma_len.
When CONFIG_NEED_SG_DMA_LENGTH is enabled,
sg_dma_len is defined as follow :
"#define sg_dma_len(sg)             ((sg)->dma_length)"
But, dma_length is not used by the framework indeed.

Change-Id: Ibfd3223b38b96701f839cdc91207a49f20789fec
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 15:26:53 +08:00
xiaoyao
e1ba522e71 net: rkwifi: initialize code to support rkwifi
Change-Id: Id8ad92690bb1565ecae45ecf1f9edba71292dfc0
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 11:57:39 +08:00
chenzhen
457a0b7e49 MALI: rockchip: tidy 'platform specific code'.
We use devfreq to implement DVFS of GPU, instead of 'legacy_dvfs'.

Change-Id: If5c8ef05c8f37c88a5c22779468b21315d71eda0
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 11:52:25 +08:00
Simon
8ad3d6962f iommu: rk-iovmm: fix back to back sg entries condition
Change-Id: Ie493d3d8b34ac4229b3a5a2a84cd52568425f106
Signed-off-by: Simon <xxm@rock-chips.com>
2016-03-09 09:29:00 +08:00
chenzhen
e0958c3066 MALI: rockchip: modify to build in kernel 4.4.
Change-Id: Ib462c42337e655607b2e222d7d97064dfc1c76c4
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-08 17:52:12 +08:00
chenzhen
b096c7187a MALI: rockchip: upgrade DDK to r8p0-02rel0.
Change-Id: I85a3bedf89a3fc27971b1d26e7bfa9a8bee32d06
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-08 17:34:30 +08:00
chenzhen
a9f9e723bc MALI: rockchip: upgrade to DDK r7p0-02rel0.
Conflicts:

	drivers/gpu/arm/midgard/mali_kbase_config.h

Change-Id: I2d93041a0525ce6f1399c3a456c4c8f7be22243e
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-08 17:31:21 +08:00
xiaoyao
5049902024 net: wifi: rockchip: update broadcom drivers for kernel4.4
Change-Id: I5a764afc5abdf8cae4ba12181ebd36a03cdcb110
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-08 17:25:42 +08:00
Huang, Tao
e089966464 Revert "UPSTREAM: regulator: core: avoid unused variable warning"
This reverts commit 40e4c35358.

Please refer to commit 70a7fb80e8
("regulator: core: Fix nested locking of supplies")

Change-Id: If0bee255621a7480cfc6fa232f65081c4d904897
2016-03-08 16:27:08 +08:00
Rocky Hao
857ad0187f cpufreq: interactive: fix cpufreq object duplicate creatation in sysfs
[    4.216722] sysfs: cannot create duplicate filename '/devices/system/cpu/cpufreq'
[    4.233798] ------------[ cut here ]------------
[    4.244376] WARNING: at fs/sysfs/dir.c:31
[    4.253556]
[    4.256975] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0 #156
[    4.270730] Hardware name: Rockchip SDK tb board (DT)
[    4.282302] task: ffffffc039670000 ti: ffffffc039678000 task.ti: ffffffc039678000
[    4.299444] PC is at sysfs_warn_dup+0x5c/0x78
[    4.309422] LR is at sysfs_warn_dup+0x5c/0x78

Change-Id: Id21fe74dc082ec6c94fcb3e0cc11b78226549f7d
Fixes: bc68f6c4ef ("cpufreq: interactive: build fixes for 4.4")
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
2016-03-07 17:49:18 +08:00
Wu Liang feng
275af0eee4 FROMLIST: usb: dwc3: Enable support for 64-bit system
Add 64-bit DMA operation support to the USB DWC3 driver.
First attempt to set the coherent DMA mask for 64-bit DMA.
If that failed, attempt again with 32-bit DMA.

Change-Id: I6d8e0e35ed606aa38d1dbadbb48f5629c1b39552
Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(am from https://patchwork.kernel.org/patch/8109031/)
2016-03-07 15:26:35 +08:00
Wu Liang feng
bd88043dd7 FROMLIST: usb: dwc3: pass arch data to xhci-hcd child
The xhci-hcd child node needs to inherit archdata attribute to use
dma_ops functions and attributes. This patch enables the USB DWC3
driver to pass archdata attributes to its xhci-hcd child node.

Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>

Change-Id: I82abc58fd8d01d2233499958713dd69ed58dedb5
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(am from https://patchwork.kernel.org/patch/8109041/)
2016-03-07 15:26:00 +08:00
Wenlong Zhuang
8d9ad6296b video: rockchip: vop-lite: fix get clock source failed
Rename clock name and fix deadlock when VOP irqs are disabling.

Signed-off-by: Wenlong Zhuang <daisen.zhuang@rock-chips.com>
Signed-off-by: Xubilv <xbl@rock-chips.com>
Change-Id: Ib794128e9e0dda0fc7b4c48d52d196e8ba70c11d
2016-03-07 15:11:28 +08:00
John Youn
ebe05c6cd2 UPSTREAM: usb: dwc3: Fix assignment of EP transfer resources
The assignement of EP transfer resources was not handled properly in the
dwc3 driver. Commit aebda61871 ("usb: dwc3: Reset the transfer
resource index on SET_INTERFACE") previously fixed one aspect of this
where resources may be exhausted with multiple calls to SET_INTERFACE.
However, it introduced an issue where composite devices with multiple
interfaces can be assigned the same transfer resources for different
endpoints. This patch solves both issues.

The assignment of transfer resources cannot perfectly follow the data
book due to the fact that the controller driver does not have all
knowledge of the configuration in advance. It is given this information
piecemeal by the composite gadget framework after every
SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
programming model in this scenario can cause errors. For two reasons:

1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION and
SET_INTERFACE (8.1.5). This is incorrect in the scenario of multiple
interfaces.

2) The databook does not mention doing more DEPXFERCFG for new endpoint
on alt setting (8.1.6).

The following simplified method is used instead:

All hardware endpoints can be assigned a transfer resource and this
setting will stay persistent until either a core reset or hibernation.
So whenever we do a DEPSTARTCFG(0) we can go ahead and do DEPXFERCFG for
every hardware endpoint as well. We are guaranteed that there are as
many transfer resources as endpoints.

This patch triggers off of the calling dwc3_gadget_start_config() for
EP0-out, which always happens first, and which should only happen in one
of the above conditions.

Fixes: aebda61871 ("usb: dwc3: Reset the transfer resource index on SET_INTERFACE")
Cc: <stable@vger.kernel.org> # v3.2+
Reported-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
(cherry picked from commit c450960187)

Change-Id: I804cb4d2f3b79b3cfd4be5b0942ed6f866c1e580
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:42:58 +08:00
Jianqiang Tang
6c7a659098 UPSTREAM: usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver.
This patch is needed in order to pass one test case
defined in the OTG Automated Compliance Test specification.

Specification location:
http://www.usb.org/developers/onthego/otgeh_compliance_plan_1_2.pdf

This test case uses PET Tool, and PET Tool is one USB hardware
equipment provided by MQP Electronics.

Test case id is 6.8.3 B-UUT Bypass Capacitance.

We must set this otg flag in order to be able to return OTG
descriptor during enumeration, otherwise this test case with
failed with below error: "Get OTG descriptor request stalled".

Signed-off-by: Jianqiang Tang <jianqiang.tang@intel.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
(cherry picked from commit 6a4290cc28)

Change-Id: If264c2a878ee8520edc57876ab2325dce4ca869e
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:41:09 +08:00
Felipe Balbi
6b51105e1c UPSTREAM: usb: dwc3: of-simple: fix build warning on !PM
if we have a !PM kernel build, our runtime
suspend/resume callbacks will be left defined but
unused. Add a ifdef CONFIG_PM guard.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 5072cfc40a)

Change-Id: I6a7ceb1a90162b132afce17423888ab0cbdf897b
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:39:28 +08:00
John Youn
64f6e3af25 UPSTREAM: usb: dwc3: gadget: don't send extra ZLP
If the request->length is zero, a ZLP should already be sent due to that
and another ZLP is not needed to terminate the transfer.

Fixes: 04c03d10e5 ("usb: dwc3: gadget: handle request->zero")
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit d9261898a4)

Change-Id: Ib976552f93321f6ea52d3f0151c66fd6f2db8b17
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:37:24 +08:00
Felipe Balbi
a1c3fa1060 UPSTREAM: usb: dwc3: gadget: pass a condition to dev_WARN_ONCE()
instead of using:

	if (condition) {
		dev_WARN_ONCE(dev, true, "foo");
		return -EINVAL;
	}

let's use:

	if (dev_WARN_ONCE(dev, condition, "foo"))
		return -EINVAL;

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 95ca961c75)

Change-Id: I8a7ee1e00ddf619d23ab974663c11fe795e9a478
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:35:26 +08:00
Felipe Balbi
233835c23f UPSTREAM: usb: dwc3: trace: show request flags
struct usb_request have 3 flags which might be
important to know about during debug. This patch
shows each of the 3 flags as a single letter:

z -> for zero
s -> short not okay
i -> interrupt

A capital letter means the feature is enabled
while a lower case letter means it is disabled;

Thus 'zsI' indicates that a ZLP is not needed,
that we can accept a short packet and interrupt
for this request should be enabled.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 46a01427e9)

Change-Id: I5d60411c51eff9f5a5f1233680bca6369f6fc6b8
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:33:25 +08:00
Felipe Balbi
f8d926f487 UPSTREAM: usb: dwc3: gadget: handle request->zero
So far, dwc3 has always missed request->zero
handling for every endpoint. Let's implement
that so we can handle cases where transfer must
be finished with a ZLP.

Note that dwc3 is a little special. Even though
we're dealing with a ZLP, we still need a buffer
of wMaxPacketSize bytes; to hide that detail from
every gadget driver, we have a preallocated buffer
of 1024 bytes (biggest bulk size) to use (and
share) among all endpoints.

Reported-by: Ravi B <ravibabu@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 04c03d10e5)

Change-Id: I4dce506b683a9381e73733d09dd03e12364bef1f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2016-03-06 21:31:26 +08:00