shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity
853,872 Commits 55 Branches 2,486 Tags
04d9d08ac36dbe5c850a2ebd3efbba8ffe9ace85
Commit Graph

853872 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Hu Kejun
04d9d08ac3 media: rockchip: isp: add check to avoid ram overflow 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I1e9bd8fa06c0652a9eee6126dbdf707d3fdd3a53
 2020-05-25 18:20:18 +08:00
Hu Kejun
16d3ed56fb media: rockchip: ispp: add check to avoid ram overflow 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Ic8b94ded20b7d5697916b403ef557aedb81c159d
 2020-05-25 18:20:18 +08:00
Nickey Yang
f26122ecf7 ARM: dts: rockchip: add rv11xx-ipc dtsi 
Management and enabling of common node more convenient

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Iad15d5cd3a5cc022d41c8c37e051382e82a34217
 2020-05-25 18:20:18 +08:00
David Wu
6f83acacb6 ARM: dts: rv1126: Fix RMII TX io drv strength 
Based on hardware testing, the level3 signal amplitude
is too strong, and it is enough to drop to the level0 value.

Change-Id: I9ea282f2524449bc81610a45cfd8b1b5e22440e3
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:18 +08:00
David Wu
1a92aacb3c ARM: dts: rv112x: Remove i2c scl rising and falling time 
These times are all wrong, not real hardware time. For example,
the real rising edge time of i2c0 SCL is about 190ns. In order
to prevent future users from filling in the wrong time, but just
copy, without testing the real time, delete these, and use the
maximum time by default.

Change-Id: I3436b57d9daaeaa8365cb6cf5de7dffbd42db9c9
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:17 +08:00
David Wu
6a9f7b8eec dt-bindings: i2c: rk3x: add support for rv1126 
Add dt Document for i2c controller on rv1126

Change-Id: Ia9d6df2e09f1c5fbf43035088b116af1aa7473fd
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:17 +08:00
Tao Huang
de3e0a3b3a ARM: dts: rockchip: Enable rng for rv11xx-evb-v10 
Before:
[  134.183519] random: crng init done
[  134.183851] random: 1 urandom warning(s) missed due to ratelimiting

After:
[    0.190031] random: crng init done

Change-Id: I80b876a3c227646bd4fcdd36d1a975cbc7e27d85
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2020-05-25 18:20:17 +08:00
Cai YiWei
93e2a9ca61 media: rockchip: ispp: fix error sharp working wiht scale 
Change-Id: I738560193f948f35772b06de94708f33e713c269
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-05-25 18:20:17 +08:00
Hu Kejun
51d5ae9e62 media: rockchip: isp: fix stats get from ddr is error 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I53d1c4fb9c370c01db04f93cdb6e6e2e2a08e8f7
 2020-05-25 18:20:17 +08:00
Hu Kejun
0ad857cf9a media: rockchip: isp: add clean int_stat after clear meas_done of rawaf 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I126730192ed6cf5f16fa916827f996d8fb6893b4
 2020-05-25 18:20:17 +08:00
Hu Kejun
c6760a5817 media: rockchip: ispp: fix config nr_ctrl_para error 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I9eb97fc8c4bd003ce20b3de48dbed0b1a52618af
 2020-05-25 18:20:16 +08:00
Jianing Ren
ff3f8c24fc ARM: dts: rockchip: amend usb and phy properties for rv1126 
Change-Id: I99e27c05f8d7372d922480bb4d3199101b71f7d7
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Jianing Ren
004b4e8245 ARM: dts: rockchip: enable usb host/phy for rv11xx_evb_v10 
Change-Id: I31860d51efa64f106f9e5820e6573fe627b2cfa9
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Jianing Ren
890c9b6034 phy: phy-rockchip-naneng-usb2: add Kconfig and Makefile 
Change-Id: Ia8e40bda152b7d5d49561509e7cebc43dcf77d0b
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Jianing Ren
9e3c5ad64f phy: add usb 2.0 phy driver for Rockchip SoCs 
This patch implements a usb 2.0 phy driver for Rockchip SoCs with
Naneng IP block.

Change-Id: I2658ce7c77a4bef60c8ab183a687d81468a512f1
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Finley Xiao
e8170f5fee ARM: dts: rockchip: rv11xx: Remove clk_ignore_unused 
Change-Id: I5d9b71388216e0770f43dfef2728ccec0bb908dd
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Finley Xiao
b63c152fb4 clk: rockchip: rv1126: Add CLK_IGNORE_UNUSED gmac niu clocks 
Change-Id: I38e2c593c395f142ea1d8c2284eee195402d4a25
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Cai YiWei
03b7f09e8f media: rockchip: ispp: fix gain and sharp config 
Increase gain size.
Disable sharp dma output if no using.

Change-Id: I0f5bd581bf39b88051b947a34f4ba90cdb789019
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Jianqun Xu
45731929c7 ARM: dts: rockchip: rv1126-iotest fix io-domain 
Change-Id: Ia8a84f7c51caae8ed3898d99e114abedfe4c2286
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Hu Kejun
e639528e79 media: rockchip: isp: fix mipi luma cannot work in two hdr frame mode 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Ic005891a9c52e163bb92e7036191c3dd659aebf9
 2020-05-25 18:20:16 +08:00
Finley Xiao
943e2c227a ARM: dts: rockchip: rv1126: Add hclk for dwc3 
Change-Id: Ic825de0e29add859d08999b6c930f54c583ad024
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Finley Xiao
0d687e91f6 clk: rockchip: rv1126: Fix clk_isp_np5 gate 
Change-Id: I19d6454b739f86be7819077d0384e05a6483f297
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Cai YiWei
1f96ffc7f4 ARM: dts: rv1126: assigned ispp and isp clock 
Change-Id: I85d56570d4e85a2264d516cdcbf0de9009d12fb4
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-05-25 18:20:16 +08:00
Sandy Huang
4418fa93ef ARM: dts: rv1126: rockchip: add grf handle to VOP and rgb pinctrl 
Change-Id: I5613e987288adc6bc1ab4b06199c4b651e0fd19e
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Jon Lin
9be683d208 ARM: dts: rv1126: add #size-cells definition to SPI node 
Change-Id: I5621cd1b6a53312b7d37bc9bff48b008cbd585c0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Finley Xiao
2d4ef59a0b clk: rockchip: rv1126: Fix ispp and core gate 
Change-Id: Iac2b70dd05b2ead291179b0eb3d7e5575cf281c9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Jianqun Xu
462ccff144 ARM: dts: rockchip: rv1126-iotest remove rk809_codec 
Change-Id: Iabf3deeb283295ad51d08eea46263e0562d6a231
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Nickey Yang
17053c4497 ARM: dts: rv11xx-evb-v10: set dovdd boot on 
Some boards can't get the camera sensor ID at one time,
So temporarily set dovdd boot-on to work around.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I5a1aee1f930ed82dab221c71756b74fd032368e1
 2020-05-25 18:20:15 +08:00
Sandy Huang
bb844fbe11 drm/rockchip: vop: rv1126: add bt1120 and grf register define 
Change-Id: I46c2215b02835484d035cd6aa53ebc41f951e3ed
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2020-05-25 18:20:15 +08:00
David Wu
35be3b7ad9 ARM: dts: rv11xx-evb-v10: Add phy clock to be enabled 
Change-Id: Ia341cb5e48575731ed895d5813addd8cd4efa453
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Tao Huang
e57281e1f3 ARM: dts: rockchip: Enable ramoops for rv1126-sphericalipc-ddr3-v10 
Change-Id: I25382eada91ef5d38ef695d25a042bdf814d4928
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Tao Huang
c07164d807 ARM: dts: rochchip: Enable ramoops for rv1126-ipc2-ddr3-v10 
Change-Id: I2697ee89e5738b992d7e3fd62ddc0d943b302be8
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2020-05-25 18:20:15 +08:00
Tao Huang
448a2e0909 ARM: dts: rockchip: Enable ramoops for rv11xx-evb-v10 
Change-Id: I9b1df7a08219511257572ce6b39dd29eb2786cd3
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2020-05-25 18:20:14 +08:00
Huibin Hong
52d1f34695 ARM: dts: rockchip: Add ramoops for rv1126 
Default reserved at 128MB.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I028718705f15bfce9472606d5f526a8c68a36a95
 2020-05-25 18:20:14 +08:00
Finley Xiao
d06da9403d clk: rockchip: rv1126: Add pll clocks to critical 
As the all parent of free mux should be enabled when set rate, and the
clk framework does not support to enable all parent of mux with more then
two parent.

Change-Id: Iee6741f2829d47ddaba05438774051691318c7b9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:14 +08:00
Nickey Yang
ba071428b2 ARM: dts: rockchip: add rv1126 sphericalipc ddr3 v10 board 
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Ie48edf56673033f63b3b1ffd4eaea41d35183b2c
 2020-05-25 18:20:14 +08:00
Finley Xiao
1c71f34f9d ARM: dts: rockchip: Change HPLL to 1400MHz for rv1126 
As hpll 1400Mhz can supply 700MHz some modules.

Change-Id: Ida70217197c0ac4c5d7df72f2fc21683681927f6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:14 +08:00
Finley Xiao
3298bf216f clk: rockchip: rv1126: Add 1400MHz for hpll 
Change-Id: Iea28ad8cd9741368281e6d84936d3520b06aa004
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:14 +08:00
Finley Xiao
07dd39cd7f clk: rockchip: rv1126: Fix clk_npu gate 
Change-Id: I3e18abcc7a4e121093f16634f6926b12896f0205
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:14 +08:00
Cai YiWei
ed9580beef media: rockchip: isp: fix dmatx iommu write failed 
If dmatx no stop, but buffer release will iommu write failed.
Waiting for dmatx stopped when hdr read back by user mode.

Change-Id: I8f9eaa386e0bcd1f01e2bf7457fe1b3b22041bbc
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-05-25 18:20:14 +08:00
David Wu
38e968cb39 ARM: dts: rv1126: Change CPLL to 500M 
Change-Id: I756d8d793d486d01b5828ace813d8eeffe0bff10
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:13 +08:00
Finley Xiao
3486385efc clk: rockchip: rv1126: Add vdec and jpeg niu clocks to critical 
Change-Id: I782ef2632d543441fa4b61a27ce57a6782ccda13
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:13 +08:00
Nickey Yang
6dc7ea13cc ARM: dts: rv1126-ipc2: add RTL8201F support 
RTL8201F ethernet working in RMII mode.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I15e47711d84f86826aebe1068a340bf293d76569
 2020-05-25 18:20:13 +08:00
David Wu
502a99bcbf ARM: dts: rv11xx-evb-v10: Add 25M out for phy_clk and 125M out for tx_clk mode 
Change-Id: Ia78847a30bab74278eaa47f34ed4ce6dd13e4433
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:13 +08:00
David Wu
5181ea9b95 ARM: dts: rv1126: It is better to define speed clock with CLK_GMAC_TX_RX 
The advantage of this is that there is no need to change the dtsi,
when changing the rgmii and rmii modes, and can go to the parent
of assign CLK_GMAC_TX_RX externally.

Change-Id: I58fa5fa3b0a59be10105e0825f6e6c6b3ebbd7d0
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:13 +08:00
David Wu
36d08472e9 ARM: dts: rv11xx-evb-v10: Fix the phy rst pin 
Hardware check againt, changed to gpio3a0.

Change-Id: Ib834791ed02413e2bfca2a6b435a9c75404ff8f4
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-05-25 18:20:13 +08:00
Lin Jinhan
bc114907dc ARM: dts: rv1126: add rng node 
Change-Id: I8d0ebfcca56683ec457bfbb88c6dd56ebe2b4b02
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2020-05-25 18:20:12 +08:00
Elaine Zhang
e03af2874d net: can: rockchip: fix up the bittiming set error 
Change-Id: I31d6316f63b73b917e32fcf46543d5f6f4f369d4
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-05-25 18:20:12 +08:00
Finley Xiao
20df17480c clk: rockchip: rv1126: Use MUXTBL to cover Mux priorities for gmac 
Change-Id: I33fc4d3fbbd3f02b8341ae80b75887bd720f18f8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2020-05-25 18:20:12 +08:00
Sugar Zhang
3ae260ba9b ARM: dts: rv1126-pinctrl: Fix iomux for acodec_adc_clk 
Change-Id: I294050ddc366345ea1adb4651fcf2db66b849004
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-05-25 18:20:12 +08:00