Commit Graph

1066620 Commits

Author SHA1 Message Date
Jianwei Fan
0d6a701cf4 media: i2c: lt7911d: fix hotplug event report
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: I1513f35467fe2b5482af20e1f7f884944a32f3d5
2022-07-08 17:31:29 +08:00
Jianwei Fan
9010eda830 media: i2c: lt6911uxc: fix hotplug event report
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: Iff105f294deaf39e3bb24c0a2376ac11b3cc9bfd
2022-07-08 17:31:29 +08:00
Jianqun Xu
e165028391 dma-buf: heaps: system_heap: fix partial sync contition error
The uncached heap can skip dma sync.
Fixes: 21f2fd663e ("dma-buf: system_heap: support cpu access partial dma-buf")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I747db5c3db482804e1a3a0b9388f3b75c1a9b87e
2022-07-08 17:31:29 +08:00
Weiwen Chen
c9dd6b483b ARM: dts: rockchip: rv1106-thunder-boot: reserved memory for meta
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I70266109c9644b849e0e42263a3c8490ee521680
2022-07-08 17:31:29 +08:00
Jason Zhang
d0e671483d arm64: configs: rockchip_defconfig: enable CONFIG_UCS12CM0
This patch enables Ultra Capteur UCS12CM0 support for the rk3588s
tablet platform with defconfig entry for UCS12CM0.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I5e865a13dd30e1429d91093f28e0543a627d1cdc
2022-07-08 17:31:29 +08:00
Jason Zhang
0a417d15ca iio: light: Add initial support for Ultra Capteur UCS12CM0
The UCS12CM0 is a color-based light to digital converter which combines
photodiodes, current amplifiers, analog circuit and digital signal
processor.

Features:
* I2C interface (Fast Speed Mode at 400kHz/s)
* Supply voltage range from 2.4V to 3.6V
* Operating temperature from -40°C to +85°C
* Package level trimming
* Power on reset & brown out reset
* Waiting time function for reducing power consumption
* R, G, B, W and IR five channel parallel output
* Fluorescent light flicker immunity
* Selectable analog gain
* Selectable resolution (up to 16-bit)
* High sensitivity in low illumination
* Wide detect range in high illumination
* High accuracy of LUX & CCT

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: Id960065ae8ebf9e6d23f7a4da9143add49db3d59
2022-07-08 17:31:29 +08:00
Finley Xiao
7d9a7b1eff MALI: bifrost: Fix NULL pointer dereference when only one regulator
Unable to handle kernel NULL pointer dereference at virtual address 0000000000000078
Mem abort info:
  ESR = 0x96000005
  EC = 0x25: DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000005
  CM = 0, WnR = 0
[0000000000000078] user address but active_mm is swapper
Internal error: Oops: 96000005 [#1] PREEMPT SMP
Modules linked in:
CPU: 2 PID: 159 Comm: kworker/u8:2 Not tainted 5.10.66 #1719
Hardware name: Rockchip RK3566 EVB2 LP4X V10 Board (DT)
Workqueue: devfreq_wq devfreq_monitor
pstate: 20c00009 (nzCv daif +PAN +UAO -TCO BTYPE=--)
pc : regulator_set_voltage+0x34/0xa0
lr : kbase_devfreq_opp_helper+0x194/0x364
sp : ffffffc014133b20
x29: ffffffc014133b40 x28: 000000000bebc200
x27: 0000000000000000 x26: ffffff8005486268
x25: 0000000000000001 x24: ffffff8005c522b0
x23: ffffff8005483800 x22: ffffff80054839e0
x21: 000000000000314c x20: 0000000000000000
x19: ffffff8005483a00 x18: ffffffc0140b5050
x17: 0000000000000000 x16: 0000000000000001
x15: 0000000000000000 x14: ffffffffffffffc8
x13: 0000000000000000 x12: 0000000000000014
x11: 0000000000000000 x10: ffffff8005486100
x9 : 00000000ffffffff x8 : f06ef41598ba9d00
x7 : 00000000000c96a8 x6 : 0000000000000001
x5 : 0000000000000001 x4 : 000000000bebc200
x3 : 0000000000000000 x2 : 000000007fffffff
x1 : ffffffc014133b20 x0 : 0000000000000000
Call trace:
 regulator_set_voltage+0x34/0xa0
 kbase_devfreq_opp_helper+0x194/0x364
 dev_pm_opp_set_rate+0x2ec/0x92c
 kbase_devfreq_target+0x7c/0xd0
 devfreq_set_target+0x80/0x200
 update_devfreq+0x114/0x148
 devfreq_monitor+0x30/0x12c
 process_one_work+0x1f4/0x490
 worker_thread+0x278/0x4dc
 kthread+0x13c/0x344
 ret_from_fork+0x10/0x30

Fixes: 98a9b2cbb4 ("MALI: bifrost: Add memory regulator support")
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie2a1f0f86169facf31de3cfc9aba5d42092a5d41
2022-07-08 17:31:29 +08:00
Jianqun Xu
52be0a6031 drm/rockchip: gem: const to use rockchip_gem_destroy
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I42e6b4b29bfeb785f167ddf20a0b25b3bed1d414
2022-07-08 17:31:29 +08:00
Jianqun Xu
1a1bf441c8 drm/rockchip: do iommu init after bind all devices
During system bootimg, drm probe will fail since failed to bind all
devices, currently the iommu init is done before bind all devices,
the iommu needs to clean up.

This patch moves the iommu init after bind all devices to reduce the
iommu clean up.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I74eba09c9c5106a2e67e7a3784e9e373229483ce
2022-07-08 17:31:29 +08:00
Algea Cao
c9fcd4910a drm/bridge: synopsys: dw-hdmi-qp: Set default output mode to hdmi
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5574e55a7e4a885a3c79e3a48bc64ac73214034f
2022-07-08 17:31:29 +08:00
Yu Qiaowei
a9b0a038aa video: rockchip: rga3: Fix BUG_ON of spin_lock in single-mode request
[  559.931013] BUG: spinlock bad magic on CPU#6, rk_mb_gtest/1066
[  559.931031]  lock: 0xffffffc014f13b00, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
[  559.931037] CPU: 6 PID: 1066 Comm: rk_mb_gtest Not tainted 5.10.66 #5
[  559.931041] Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT)
[  559.931045] Call trace:
[  559.931051]  dump_backtrace+0x0/0x1b4
[  559.931055]  show_stack+0x24/0x30
[  559.931061]  dump_stack_lvl+0xc8/0xf8
[  559.931064]  dump_stack+0x18/0x34
[  559.931070]  spin_bug+0x90/0xb4
[  559.931075]  do_raw_spin_lock+0x44/0xe0
[  559.931080]  _raw_spin_lock_irqsave+0x30/0x44
[  559.931086]  rga_request_submit+0x30/0x220
[  559.931090]  rga_ioctl+0x280/0x7a4
[  559.931095]  vfs_ioctl+0x34/0x54
[  559.931099]  __arm64_sys_ioctl+0x6c/0xa0
[  559.931104]  el0_svc_common.constprop.0+0x13c/0x1ec
[  559.931107]  do_el0_svc+0x8c/0x98
[  559.931111]  el0_svc+0x20/0x30
[  559.931115]  el0_sync_handler+0xd8/0x184
[  559.931119]  el0_sync+0x1a0/0x1c0

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I8876383e5692f66bbd44a7a32d7208c2b2810733
2022-07-08 17:31:28 +08:00
Jason Zhang
59f2aa3fd3 arm64: configs: rockchip_defconfig: enable CONFIG_IIO_ST_LSM6DSR
This patch enables ST LSM6DSR support for the rk3588s tablet platform
with defconfig entries for IIO_ST_LSM6DSR, IIO_ST_LSM6DSR_I2C and
IIO_ST_LSM6DSR_SPI.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I026f651aae0b9de78601f7d856adee540569ed4e
2022-07-08 17:31:28 +08:00
Jason Zhang
1927f5785f iio: imu: Add initial support for ST LSM6DSR
The LSM6DSR is a system-in-package featuring a 3D digital accelerometer
and a 3D digital gyroscope with an extended full-scale range for the
gyroscope, up to 4000 dps, and high stability over temperature and time.

The LSM6DSR features the following on-chip functions:
* 9 kbytes data buffering, data can be compressed two or three times
* Event-detection interrupts (fully configurable):
  - Free-fall
  - Wakeup
  - 6D orientation
  - Click and double-click sensing
  - Activity/inactivity recognition
  - Stationary/Motion detection
* Specific IP blocks with negligible power consumption and
  high-performance
  - Pedometer functions: step detector and step counters
  - Tilt
  - Significant Motion Detection
  - Finite State Machine (FSM) for accelerometer, gyroscope, and external
    sensors
* Sensor hub
  - Up to 6 total sensors: 2 internal (accelerometer and gyroscope) and 4
    external sensors
* S4S data rate synchronization with external trigger for reduced sensor
  access and enhanced fusion

Current driver offers support for accelerometer and gyroscope.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: Ie24caba8755538e5ac0e87b2663eb89e7d2b391a
2022-07-08 17:31:28 +08:00
Jason Zhang
a2c96f974d iio: Add channels for LSM6DSR sensor HUB
Add new channels types support for LSM6DSR sensor HUB:
* IIO_SIGN_MOTION
* IIO_STEP_DETECTOR
* IIO_STEP_COUNTER
* IIO_TILT
* IIO_TAP
* IIO_TAP_TAP
* IIO_WRIST_TILT_GESTURE
* IIO_GESTURE

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I8f3f2feae32b94ad6802a9a359ec11ab94a96816
2022-07-08 17:31:28 +08:00
Jason Zhang
2c5b0fb9db iio: Add FIFO event for LSM6DSR sensor HUB
Add FIFO event type:
* IIO_EV_TYPE_FIFO_FLUSH

This change also adds FIFO event directions:
* IIO_EV_DIR_FIFO_EMPTY (indicates the FIFO is empty)
* IIO_EV_DIR_FIFO_DATA (indicates the FIFO is not empty)

A FIFO flush event is triggered after the HW FIFO is flushed,
and indicates that whether the HW FIFO is empty or not.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: Idb21bc271c7fd8def63f2cb29440ebf0677688d5
2022-07-08 17:31:28 +08:00
Jason Zhang
7783835a83 iio: light: vl6180: add custom initialization
Set up the registers related to range according to the datasheet.

Note that some registers is unavailable on the datasheet, but they are
unbelievably useful.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I599ad6fb2a76f79dfd600d626871574221f1aca6
2022-07-08 17:31:28 +08:00
Jason Zhang
31654742f5 iio: light: vl6180: add support for irq and buffer setup
Add support for interrupt request and buffer setup. Use device
interrupt for reading measurements of ALS, range and proximity.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: Idb605241df51519e49e3e4df471c5efe70948dcb
2022-07-08 17:31:28 +08:00
Jason Zhang
61ce1f9f69 dt-bindings: iio: light: vl6180: support power control using gpio
Support power supply and enable using gpio (if provided).

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I2ed5acf9b38652d1e999a072dda17fa069cde23c
2022-07-08 17:31:28 +08:00
Jason Zhang
9a87d22369 iio: light: vl6180: support power control using gpio
There are AVDD and GPIO0/CE in the pinout of STMicro VL6180:
  - AVDD (Digital/analog power supply 2.6 to 3.0 V),
  - GPIO0/CE (Power-up default is chip enable (CE)).

These two pins are gpio connected in some reference design boards and
control the power in the Power-up timing constraints. This patch
emulates this situation.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: I610455ea7ca738303ec6dd6ff496576ff2e716ce
2022-07-08 17:31:28 +08:00
Yifeng Zhao
487de35b82 emmc: sdhci-of-dwcmshc: improve compatibility with HS400ES mode
This patch modify the strobe tap number for better compatibility
with HS400ES mode.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I7ceb37c448250170f2bf394381a43bd0e925ddfa
2022-07-08 17:31:28 +08:00
Jason Zhang
cfdc967433 arm64: rockchip_defconfig: enable CONFIG_VL6180
This patch enables ST VL6180 support for the rk3588s tablet platform
with defconfig entry for VL6180.

Signed-off-by: Jason Zhang <jason.zhang@rock-chips.com>
Change-Id: Ic42b8f98309d527b8e73843df9d45ad1c82e4328
2022-07-06 18:41:45 +08:00
ZhiZhan Chen
ef54cd46a4 arm64: rockchip_linux_defconfig: enable CONFIG_VIDEO_ROCKCHIP_HDMIRX
Signed-off-by: ZhiZhan Chen <zhizhan.chen@rock-chips.com>
Change-Id: I967cd245e28fe5b6b158bf3095012a091c4a757c
2022-07-06 18:23:40 +08:00
Zefa Chen
3e29852076 media: rockchip: vicap add mutex lock for group sync mode
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Iacb2fb3c1dbeac9668a0fda27f9197878fea5b4e
2022-07-06 18:01:24 +08:00
Sugar Zhang
15e40b3515 soc: rockchip: cpuinfo: Add support for rv1106/3
This patch adds support for rv1106/3 soc and get
chip version from OS_REG1[2:0] which was written by SPL.

Details ref to Rockchip_Introduction_OS_REG.md

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ib833a55acb70490945a37b5fdab7a29dcb5c3e6e
2022-07-06 18:00:14 +08:00
zefa.chen
4f046e4d9e media: rockchip: vicap fixed segfault about buffer operations
Change-Id: Id2024d9fd3e0b951668dd58a9067e62d617292d3
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
2022-07-06 17:24:48 +08:00
Robin Murphy
18bbc5a5e6 UPSTREAM: iommu/iova: Improve 32-bit free space estimate
For various reasons based on the allocator behaviour and typical
use-cases at the time, when the max32_alloc_size optimisation was
introduced it seemed reasonable to couple the reset of the tracked
size to the update of cached32_node upon freeing a relevant IOVA.
However, since subsequent optimisations focused on helping genuine
32-bit devices make best use of even more limited address spaces, it
is now a lot more likely for cached32_node to be anywhere in a "full"
32-bit address space, and as such more likely for space to become
available from IOVAs below that node being freed.

At this point, the short-cut in __cached_rbnode_delete_update() really
doesn't hold up any more, and we need to fix the logic to reliably
provide the expected behaviour. We still want cached32_node to only move
upwards, but we should reset the allocation size if *any* 32-bit space
has become available.

Reported-by: Yunfei Wang <yf.wang@mediatek.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/033815732d83ca73b13c11485ac39336f15c3b40.1646318408.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 5b61343b50)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If5b30d12f8d0cef77cfd2f3fe19e99be4897dc0e
2022-07-06 16:15:49 +08:00
Jianqun Xu
3c9526f479 iommu/iova: remove a iova procfs if existed
Since the dma iommu iova maybe deinit, the iova procfs lack of a deinit
operation, driver will complain such as:

[    3.143475] ------------[ cut here ]------------
[    3.143501] proc_dir_entry 'iova/ff920000.rkisp1' already registered
[    3.143545] WARNING: CPU: 1 PID: 154 at fs/proc/generic.c:381 proc_register+0x104/0x128
[    3.143552] Modules linked in:
[    3.143567] CPU: 1 PID: 154 Comm: kworker/u12:2 Not tainted 5.10.66 #19
[    3.143573] Hardware name: Rockchip RK3399 EVB IND LPDDR4 Board edp (Linux) (DT)
[    3.143586] Workqueue: events_unbound deferred_probe_work_func
[    3.143598] pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--)
[    3.143606] pc : proc_register+0x104/0x128
[    3.143614] lr : proc_register+0x104/0x128
[    3.143620] sp : ffffffc0128bb9c0
[    3.143625] x29: ffffffc0128bb9c0 x28: 0000000000000000
[    3.143637] x27: ffffffc011cd40e0 x26: 0000000000000000
[    3.143648] x25: 0000000000000000 x24: ffffff8002aaf690
[    3.143658] x23: ffffff8002fd14bc x22: ffffffc011b65820
[    3.143669] x21: ffffff8004050298 x20: ffffff8002aaf600
[    3.143680] x19: ffffff8002fd1400 x18: 0000000000000000
[    3.143690] x17: 0000000000000000 x16: 0000000000000000
[    3.143701] x15: 000000000000000a x14: 6465726574736967
[    3.143711] x13: 6572207964616572 x12: 6c61202731707369
[    3.143722] x11: 6b722e3030303032 x10: 3966662f61766f69
[    3.143733] x9 : ffffffc01009fe50 x8 : 7269645f636f7270

Fixes: 4fe55239b3 ("iommu/iova: add iova procfs for each dma iommu")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If8aa00bacd13f72efda266632d06ef6899776f5f
2022-07-06 16:13:12 +08:00
Algea Cao
9f8c23685e drm/bridge: synopsys: dw-hdmi-qp: Configure YCC quant range correctly
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I72b4cb4f9c16e0379e3ea2c948d4c20952b840c1
2022-07-06 15:13:23 +08:00
Guochun Huang
2cb3ef11d2 arm64: dts: rockchip: rk3588-vehicle: remove redundant dsi info
Change-Id: Ifd0ee61f98cc3f1b725e86f36582d69de5261cff
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2022-07-05 16:59:04 +08:00
Guochun Huang
3f14255c0a arm64: dts: rockchip: rk3588-vehicle-serdes-display: enable dsi logo display
Change-Id: Id158518dbbf4a76467dcfd632621f770e468fb55
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2022-07-05 16:58:35 +08:00
Yiqing Zeng
5244d0ec1b media: i2c: ov7251 support 640x480@120fps
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I7d70f6d7f88079fd5242586b084724312adfb0aa
2022-07-05 16:36:02 +08:00
shengfei Xu
6be5bff60f power: supply: charger: add sc89890 charger driver
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ie231a1cabdfefce43fc8f21993d981df2395cf31
2022-07-05 16:35:34 +08:00
Yu Qiaowei
004ba6e22a video: rockchip: rga3: Fix some formats cannot match core
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ia6f6e43342f7a77d1bcf5e4cd4ed64b4d567d5f8
2022-07-05 14:27:22 +08:00
Ziyuan Xu
0a58d4293e ARM: dts: rockchip: rv1106: fixes reg rangs for saradc
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I6add738ac91acdef41edd3beb825c6cab5316425
2022-07-05 14:25:16 +08:00
Cai YiWei
349cd33d87 media: rockchip: isp: add tb api for rockit
Change-Id: I8d08816cda58c2605e7b8dd0558e7207644e33c1
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-07-05 11:43:39 +08:00
Yiqing Zeng
d1e3960225 media: i2c: gc4023 fix gain err bug
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I0043db47c133ac8171f570f195a853b2cba0a426
2022-07-05 11:36:58 +08:00
Wu Liangqing
1a457360e5 arm64: dts: rockchip: rk3588s-tablet: enabled dp0_sound and sdmmc
Change-Id: Ib3488ac2121a3978593c166a83d9b4f13fce2c68
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2022-07-05 09:36:00 +08:00
Jianqun Xu
973dd55ebe rknpu: gem: add error message print for dma map failure
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ia44dd2ee0a55523aeb3a1d2692ee457b0c11049e
2022-07-05 09:04:55 +08:00
David Wu
6f6e125edd net: phy: rk630phy: Swap the bgs position of 100M and 10M
According to the latest otp table, do the corresponding change
for 100M and 10M bgs.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I3c56562e1839fd104c7467a5a28469edd8f49db7
2022-07-04 18:11:33 +08:00
Jianqun Xu
54d5477652 drm/rockchip: drm gem support flags ROCKCHIP_BO_DMA32
Userland can use the flag ROCKCHIP_BO_DMA32 to tell drm gem to get pages
limit to 4GiB memory.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Icdc77efae71ed6272f425ad93a07c8d3e98a9ca4
2022-07-04 18:09:22 +08:00
Sugar Zhang
e5ce8d29d8 ALSA: pcm_dmaengine: always get stream position from DMA driver
This patch fixup that the wrong position when dma desc status
is DONE. even if the desc status is DONE, it is still able to
get the position from the dma driver. so, just remove the judgement.

BACKGROUND
In the Multi-Stream audio situation, Some Stream XRUNs unexpected,
These stream drived by the synchronous clk, So, it should not be.

After enable trace, we find the route cause:

CONFIG_FUNCTION_TRACER
CONFIG_FUNCTION_GRAPH_TRACER
CONFIG_STACK_TRACER
CONFIG_DYNAMIC_FTRACE

/# cd /sys/kernel/debug/tracing
/# echo "snd_pcm:applptr" >> set_event
/# echo "snd_pcm:hwptr" >> set_event
/# echo "snd_pcm:xrun" >> set_event
/# cat trace | head -20
/# echo 1 > tracing_on
/# cat trace_pipe > trace.txt

110.291854: applptr: pcmC1D0p/sub0: prev=0, curr=960, avail=2880, period=960, buf=3840
110.292258: applptr: pcmC2D0p/sub0: prev=0, curr=960, avail=2880, period=960, buf=3840
110.292464: applptr: pcmC3D0p/sub0: prev=0, curr=960, avail=2880, period=960, buf=3840
110.292704: applptr: pcmC0D0p/sub0: prev=0, curr=960, avail=2880, period=960, buf=3840
110.293631: applptr: pcmC1D0p/sub0: prev=960, curr=1920, avail=1920, period=960, buf=3840
110.293708: applptr: pcmC2D0p/sub0: prev=960, curr=1920, avail=1920, period=960, buf=3840
110.293750: applptr: pcmC3D0p/sub0: prev=960, curr=1920, avail=1920, period=960, buf=3840
110.293787: applptr: pcmC0D0p/sub0: prev=960, curr=1920, avail=1920, period=960, buf=3840
...
110.773563: applptr: pcmC2D0p/sub0: prev=25920, curr=26880, avail=8, period=960, buf=3840
110.773564: hwptr: pcmC0D0p/sub0: IRQ: pos=8, old=22088, base=19200, period=960, buf=3840
110.773573: hwptr: pcmC3D0p/sub0: POS: pos=8, old=23048, base=23040, period=960, buf=3840
110.773594: applptr: pcmC3D0p/sub0: prev=25920, curr=26880, avail=8, period=960, buf=3840
110.773624: hwptr: pcmC0D0p/sub0: POS: pos=8, old=23048, base=23040, period=960, buf=3840
110.773648: applptr: pcmC0D0p/sub0: prev=25920, curr=26880, avail=8, period=960, buf=3840
110.773930: hwptr: pcmC1D0p/sub0: POS: pos=32, old=23048, base=23040, period=960, buf=3840
110.775376: hwptr: pcmC1D0p/sub0: POS: pos=104, old=23072, base=23040, period=960, buf=3840
110.775460: applptr: pcmC1D0p/sub0: prev=26880, curr=26984, avail=0, period=960, buf=3840
110.793215: hwptr: pcmC1D0p/sub0: IRQ: pos=960, old=23144, base=23040, period=960, buf=3840
110.793322: applptr: pcmC1D0p/sub0: prev=26984, curr=27840, avail=0, period=960, buf=3840
110.793347: hwptr: pcmC2D0p/sub0: POS: pos=0, old=23048, base=23040, period=960, buf=3840
110.793667: hwptr: pcmC2D0p/sub0: IRQ: pos=976, old=23048, base=23040, period=960, buf=3840
110.794523: applptr: pcmC2D0p/sub0: prev=26880, curr=26888, avail=0, period=960, buf=3840
// applptr was block over one period
110.794703: hwptr: pcmC3D0p/sub0: IRQ: pos=1024, old=23048, base=23040, period=960, buf=3840
110.794804: hwptr: pcmC0D0p/sub0: IRQ: pos=1028, old=23048, base=23040, period=960, buf=3840
110.813277: hwptr: pcmC1D0p/sub0: IRQ: pos=1920, old=24000, base=23040, period=960, buf=3840
110.813330: hwptr: pcmC2D0p/sub0: IRQ: pos=1920, old=23048, base=23040, period=960, buf=3840
110.813714: hwptr: pcmC3D0p/sub0: IRQ: pos=1936, old=24064, base=23040, period=960, buf=3840
110.813759: hwptr: pcmC0D0p/sub0: IRQ: pos=1936, old=24068, base=23040, period=960, buf=3840
110.833221: hwptr: pcmC1D0p/sub0: IRQ: pos=2880, old=24960, base=23040, period=960, buf=3840
110.833336: hwptr: pcmC2D0p/sub0: IRQ: pos=2880, old=23048, base=23040, period=960, buf=3840
110.834086: hwptr: pcmC3D0p/sub0: IRQ: pos=2912, old=24976, base=23040, period=960, buf=3840
110.834216: hwptr: pcmC0D0p/sub0: IRQ: pos=2920, old=24976, base=23040, period=960, buf=3840
110.853208: hwptr: pcmC1D0p/sub0: IRQ: pos=0, old=25920, base=23040, period=960, buf=3840
110.853293: hwptr: pcmC2D0p/sub0: IRQ: pos=0, old=23048, base=23040, period=960, buf=3840
110.853991: hwptr: pcmC3D0p/sub0: IRQ: pos=28, old=25952, base=23040, period=960, buf=3840
110.854001: xrun: pcmC3D0p/sub0: XRUN: old=26908, base=26880, period=960, buf=3840
110.854719: hwptr: pcmC0D0p/sub0: IRQ: pos=64, old=25960, base=23040, period=960, buf=3840
110.854727: xrun: pcmC0D0p/sub0: XRUN: old=26944, base=26880, period=960, buf=3840
110.873221: hwptr: pcmC1D0p/sub0: IRQ: pos=960, old=26880, base=26880, period=960, buf=3840
110.873239: xrun: pcmC1D0p/sub0: XRUN: old=27840, base=26880, period=960, buf=3840
110.874682: applptr: pcmC2D0p/sub0: prev=26888, curr=27840, avail=56, period=960, buf=3840

grep "applptr: pcmC2D0p" trace.txt:

applptr was block over 4 periods (80ms)

110.773563: applptr: pcmC2D0p/sub0: prev=25920, curr=26880, avail=8, period=960, buf=3840
110.794523: applptr: pcmC2D0p/sub0: prev=26880, curr=26888, avail=0, period=960, buf=3840
110.874682: applptr: pcmC2D0p/sub0: prev=26888, curr=27840, avail=56, period=960, buf=3840

grep "hwptr: pcmC2D0p/sub0: POS" trace.txt:

110.613370: hwptr: pcmC2D0p/sub0: POS: pos=0, old=15360, base=15360, period=960, buf=3840
110.633389: hwptr: pcmC2D0p/sub0: POS: pos=960, old=16320, base=15360, period=960, buf=3840
110.653371: hwptr: pcmC2D0p/sub0: POS: pos=1920, old=17280, base=15360, period=960, buf=3840
110.673403: hwptr: pcmC2D0p/sub0: POS: pos=2880, old=18240, base=15360, period=960, buf=3840
110.693523: hwptr: pcmC2D0p/sub0: POS: pos=8, old=19200, base=19200, period=960, buf=3840
110.713477: hwptr: pcmC2D0p/sub0: POS: pos=968, old=20168, base=19200, period=960, buf=3840
110.733362: hwptr: pcmC2D0p/sub0: POS: pos=1920, old=21120, base=19200, period=960, buf=3840
110.753459: hwptr: pcmC2D0p/sub0: POS: pos=2888, old=22088, base=19200, period=960, buf=3840

invalid POS rollback (8 -> 0):

110.773536: hwptr: pcmC2D0p/sub0: POS: pos=8, old=23048, base=23040, period=960, buf=3840
110.793347: hwptr: pcmC2D0p/sub0: POS: pos=0, old=23048, base=23040, period=960, buf=3840

Change-Id: I40e92bae09a002f4f5f0b2fab8b0e99fd3ee269d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2022-07-04 18:08:27 +08:00
Wyon Bi
304dbb104d drm/bridge: analogix_dp: Add DP Test Automation
Test on RK3588 with Unigraf DPR-100 DP reference sink.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I01c099e1ad25ab92d9e8efef13c0c2304115a957
2022-07-04 09:10:28 +00:00
Dingxian Wen
79f32b338b media: rockchip: hdmirx: add hdmirx scene DDR frequency conversion
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I154f57f4013f07673d826151224c71638436b0c7
2022-07-04 14:56:21 +08:00
Dingxian Wen
62becd888a arm64: dts: rockchip: rk3588: dmc add SYS_STATUS_HDMIRX
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I931349c58354eae8b25b5a637e9bcf4fd6ab925e
2022-07-04 14:55:51 +08:00
Finley Xiao
a6098a99a7 PM / devfreq: rockchip_dmc: Add SYS_STATUS_HDMIRX
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I133589dd2a1f8b88f08a20e7caaf10a3e84c04e3
2022-07-04 14:55:08 +08:00
Sandy Huang
22dbcb386f drm/rockchip: vop2: update cds div and dsc_htotal for 1 slice panel
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iaf7af6b697add09b08a0984052af4d357add0747
2022-07-04 14:36:15 +08:00
Yu Qiaowei
344479a3b4 video: rockchip: rga3: Fix physical continuous dma_fd not working
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I7ccfbd9bf1af4fc300f9367fc247f300ef82be4b
2022-07-04 11:27:58 +08:00
Cai YiWei
d46850b0ab media: rockchip: isp: support mesh buf count from user for isp30 and isp32
Change-Id: If2473f0a040f97786833fdfdadb2928e5092a575
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2022-07-04 11:24:41 +08:00
William Wu
970efca023 phy: rockchip: inno_usb2: update phy tuning for rv1106 and rv1103
1. Set different pre_emphasize strength for rv1106 and rv1103.
   - Set pre_emphasize strength to 0x03 for cpu verison_0;
   - Set pre_emphasize strength to 0x01 for cpu verison_1;

2. Bypass Squelch detector calibration to improve receiving
   sensitivity.
   - Before: E-17 248.7mv, E-16 112.6mv
   - After:  E-17 150mv,   E-16 98.8mv

Note:
E-17 and E-16 is on page 3 of the "USB 2.0 Electrical Compliance Test Specification"
https://usb.org/document-library/usb-20-electrical-compliance-test-specification-version-107

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0d668b3d126583ada03d9675e0175f02537d915f
2022-07-01 21:01:47 +08:00
Zefa Chen
ee66b0c6b8 media: rockchip: vicap fixed error when sditf is NULL
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Iadecf86f27f35090c3daba4c5e28def4ab7ad62c
2022-07-01 18:43:20 +08:00