We can configurate phy setting in dts node "rockchip,phy_table"
with following format:
<maxfreq pre-emphasis slopeboost clklevel data0level data1level data2level>
Phy setting table must list from low freq to high freq and cover
all supported frequency, for example:
&hdmi {
status = "okay";
rockchip,phy_table =
<165000000 0 0 17 17 17 17>,
<340000000 0 0 14 17 17 17>,
<594000000 0 0 9 17 17 17>;
};
If dts node is not exist, we use default setting defined in code.
Change-Id: I06731419057a2a8cf4d210bf566b1206edc39ea1
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
For YCbCr420 mode, input color and output color must be same as
HDMI_COLOR_YCBCR420.
Change-Id: I302c1a0572d706abdebf5d2d35bd100e0242edf9
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit c3ed688f02f76dfc5533124c41bbb8c016e3cc97)
if rk818 driver's shutdown func called, it should not do i2c transfer.
And rk818's shutdown func is behind of i2c driver's shutdown func.
Change-Id: Iec96ad4640894f604493d8c764a2f98e75397885
Signed-off-by: David Wu <wdc@rock-chips.com>
rk_fb display need ion and backlight node,
so add ion and backlight node.
Change-Id: I89ed88e429a2ea56e19bc12bc818ffba71f9e3b2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
add capabilities query interface for userspace to query
iep device feature in current soc.
Change-Id: I377e686b2ce0357aa75445e4e47e9e4883a077ae
Signed-off-by: alpha.lin <alpha.lin@rock-chips.com>
HAL_PIXEL_FORMAT_YCrCb_420_SP_10 means yuv444 10bit format, but its
name looks like yuv 420sp 10bit, that is wrong.
Change-Id: I71db8577df6e3d912427ddafe057905870622ab2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
In above case, old code will generate a fault address for
uv address if 4k video input or output.
Change-Id: I22e9793fbaa2da250097ba69a3fd4fdf58585b78
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
If CONFIG_MFD_SYSCON macro define but no grf resource
define in dts will cause a error before this revision.
Change-Id: I70432530fba9c7a5d0b8f5a0c996d67237eb8198
Signed-off-by: alpha.lin <alpha.lin@rock-chips.com>
1. su & stop;
2. copy the picture bin to /data/fb0.bin;
3. echo "n xsize ysize format" > /sys/class/graphics/fb0/dsp_buf;
ps:
a. n is the number of picture
b. xsize and ysize is the picture resolution
c. format:
RGBA=1,RGBX=2,RGB=3,YUV420_SP=17
Change-Id: Id256bee73958b6ab6250a17a723b0b73e7197874
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
1. Change fiq debugger trigger mode, enter “fiq” instead of
F5 with SecureCRT
Change-Id: I3b52ad435af3211675a8416c6e016147886def8d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
1.add the function of configure ddr timing such us sr_idle, pd_idle, odt
disable frequency, dll bypass frequency, odt strength, driver strength in dts.
2.make sure commit 8be554a502 ("rk3368 dts: add ddr timing node in
rk3368.dtsi" add ddr timing node in dts that user can configure ddr timing in
dts file.) was merged.
3.bl30 must update to rk3368bl30_v2.11.bin.
Change-Id: Ie8ae559c8128eb01788271a4333c465e21954ab1
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
rk808 setting voltage had a overshoot question
so we set voltage must step by step.
support 12.5mv/step.
Change-Id: Idfce7b57d6717e51afaff2c170eff7bd16de23af
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
