For controller which is managed by PD (power-domain),
when PD off, the controller is reset to the default
status, and the FRAC-DIV is a fixed value(1/20).
Once the mclk is enabled, there are some high freq cycle
leak, to fix this issue, we use the pinctrl-idle to
block these cycles until the config has been come back
to the normal state.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I4e34129277cffa7bc443b6addfb1e26b70bf546e
Define a protocol specification for SPI slave transmission,
with the following main requirements:
1.ctrl packet with 2B cmd, 2B addr(offset in APP_RAM), 4B data
(usually is the following data packet length);
2.data packet with data;
3.support ctrl packet only for configuration;
4.support ctrl packet witch data packet for IO transmission.
5.spidev_rkslv support SPI_OBJ_APP_RAM_SIZE application buffer
Start the test in master device, like following:
echo read 64 1000 > /dev/spidev_rkmst_misc
Show the application buffer in slave device, like following:
echo appmem 0 256 > ./dev/spidev_rkslv_misc
Change-Id: I531e812be56826729345f6718019662fc6f414ae
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
because I2S_SDO2/3 is mux with I2S_SDI3/2.
pinctrl: not freeing pin 58 (gpio1-26) as part of deactivating group i2s0-sdi2
pinctrl: not freeing pin 57 (gpio1-25) as part of deactivating group i2s0-sdi3
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iba7549712841f21866d4c388a32c5626bfb6af11
pinctrl-default/idle/clk must be paired in the same iomux group.
DON'T USE i2s2m0-default with i2s2m1-idle
Ref: commit: b935bf8cc83f ("ASoC: rockchip: i2s-tdm: Add support for pinctrl idle state")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I0bf6f1cfb74d7f398050961913439031fa90245f
On the QUIRKS_ALWAYS_ON path, we bring up the clk path on probe
to achieve the clk always on function.
for this situation, the refcount always true, so, we should save
the stream dma state on pause and then do restore on resume.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8e45b78a475a468880ef2fb0b358dbdd1169ff08
CLK_ALWAYS_ON should be placed after all registers write done,
because this situation will enable XFER bit which will make
some registers(depend on XFER) write failed.
Fixes: 3644caf8de ("ASoC: rockchip: i2s-tdm: Add support for clk always-on")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iffcfed18d3805ee575df4e8cf267d4ef6a3fa866
I2S1 has two iomux group, M0 is located in BUS_IOC,
and M1 is located in PMU_IOC. they are controlled by
different IOE bit.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ib6b302e8b03aa7d64bdd11862c413c736eaf4636
register PDM_SYSCONFIG is marked as volatile, and for regcache
sync policy, it will skip the registers which marked as volatile.
so, we should do it after regcache sync.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ic65bc28d14fefc6e6c70e1b2c26468aa0fcd142e
The new hardware design will connect clkreq to the control pin of the
external clock, so the default output should be low level。
Change-Id: I2c99b90b7de359c8f32576d5f6eb7157c7a4a7b5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I04237f1b1f56c5abbb4b61f0a2c1af89b1e32bc3
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I619605ee9f71f912e495a2eb991746cdc67d8dd8
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8734c40041733b51107d0ed9715606111b2b94b9
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iaac7ecc28e2a686e0c01ff4f3ae082d90fe3474d
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I757328e08969031a638e2f7b7da09bf7473f8a0b
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I08b127b7f75f303c8da45973d068f57b9a6ebc62
This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for
clk noise reduction on slave mode which clk is provided by external
devices. and this can make controllers work much more robust.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I27ff54d8e17ef9a41cf2db91dbbfb8e81f8227ff
to solve the problem of the camera being unable to restore the default frame rate after adjust it to other frame rates
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Iedbeca79cb17368922d41a55ef2aafeb58170e1f
The v2 tuning has a defect, When tuning again, it is possible to
choose the phase that was previously selected which cannot work
stable.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I0dcc83bb35567278e8a10f1964f4636573b165ec
When spi slave is configured and ready to sample the clk from the
spi master, sending the gpio signal to remote, and the signal is
rising edge effective.
Add gpio to spi dts node like following:
&spi1 {
...
ready-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>;
...
};
Change-Id: I38c81d9058a1eb0c5397a37df99c22d273c30692
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The feature cs-inactice support ss_in_n posedege interrupt in slave
mode, but it's need to disable the feature of cs-inactive.
Change-Id: I7a983719811589ee729a4355d3d5159ec78d1257
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
* Fix power reference counting error
* Fix issue with IOMMU mode limited to 32-bit
* Reduce the time consumed by dma mapping
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: I93ea77fee4904455a80dfe6303ff049f3338742b
This implements new APIs to get soc info and set opp hardware info.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I167a37f661ce6fc8b32afc7768985fe23e35318c
