Enable the maxim max96772-based panels used on RK3588 vehicle s66 project.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I2065012318aab045c91500c7f9691bd9bee1007a
logical and physical nodes are separated, one logic node can
connect multi hw node
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ibb75cc466452aedff8f50d29331b191d2fbd922a
1. all logic node of mipi phy can get all hw of mipi phy
2. the links between logic and hw is determined by upper level equipmen
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Icc0cb88c3294a119431ac24b0043e44e34b1b292
set HSTX_CLK_SEL 1`b1 when cphy lane rate under 500Msps,
while set HSTX_CLK_SEL 1`b1 when dphy lane rate under 1500Mbps
Change-Id: Ic42ce385c1952febe0327594231f6bffb2543c5e
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
The voltage domain of the usb2 phy grf interrupt mask
register usually belongs to the VD_LOGIC in most of
Rockchip SoCs. So if the VD_LOGIC is power off after
system suspend, the configuration of the usb2 phy grf
interrupt mask may lost when resume.
Test on RK3588 platform with micro usb2.0 interface,
if this case happened, the usb device failed to connect
to host, because the usb device depends on the bvalid
irq to start the enumeration.
This patch enable the bvalid detect irq upon resume
for otg port, and schedule the otg sm delayed work
if the bvalid is high which means that usb device has
connected to Host.
Change-Id: I29245ec4fc812e45eb3f52cc5c2c270b659a0cc6
Signed-off-by: William Wu <william.wu@rock-chips.com>
The legacy api drmModeCrtcSetGammalegacy can be called independently, so it need extra config done;
and the atomic api have config done at the vop2_crtc_atomic_flush();
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Idca4c42f1d298ec312dc839ee526e4132d9d8b73
1. config vp1 pre_dither_down at split mode;
2. disable pre_dither_down at YUV 10/8 bit output and RGB 10 bit output;
3. enable pre_dither_down at RGB 8/6 bit output;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I304fc66324c97e3e4f50e03b8c8c2c1835871b1a
Do DR_SWAP (UFP/Sink swap to DFP/Sink) when received VDM DiscIdentity
NAK or terminated in VDM DiscModes to fix altmode negotiation failure.
This can fix a few odd DP monitor (DFP/Source) can not start DR_SWAP
to UFP/Source role at DP altmode negotiation stage.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ieae9489c068064a20e04151f322ac82a71a72aa4
Support two AVM cameras powered by max96712 and max96722.
Support i2s1 works with ADSP-21562 in tdm8 format, and i2s3 to bluetooth.
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Ic766cc17298ef2a03cc362a62e780e24f2ca1060
SMIC TudorAG and previous versions:
During playback, a POP sound occurs when the recording is opened.
This patch is intended to fix this issue.
Change-Id: I86f79cd531738113092723e1ef198b093ae472b9
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Some SDIO devices need stable clock provided even after finishing
data transfer.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I5f048e15b3cafb2d24b93dbd41892f2fb77f8df8
Power save optimization may cause rkvdec timeout when decoding some HEVC
bitstream.
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Change-Id: I60c9e578e53a37dbe610b03912fc0007a782f960
rk_flinger_first_done & vehicle_flinger_reverse_open may run
at the same time, cause buffer rotate-mirror value changed;
so fix it.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ie278d89d53386a91700961137f2a60a6a442c0e9
when vehicle in open state, set android ready will close/open stream;
cause preview stuck a moment, so fix it.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I1734edb8de1f52434fa8e6a3a890453fbd51945e
Original vop show required 64 pixel aligned for width,
but now all resolution are scale to 1920x1080 or
1088x1920 for 90/270 degree rotation is 64 aligned;
so rga blit is no needed to do 64 aligned limit, fix it.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I42433009182d1f29372a0ebe4f7482f9b82a64f6
