Commit Graph

847776 Commits

Author SHA1 Message Date
Sandy Huang
189c4d2432 drm/rockchip: add support sideband windows
sideband is a fast display path, this path bypass the surfaceflinger and
hwc, use DRM_IOCTL_MODE_SETPLANE directly show video to the panel.

Change-Id: I0b54d1d4b38505b0244d0c78f54b0d0f01c7dd37
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2020-01-17 14:51:20 +08:00
Finley Xiao
ce2f5a69c5 cpu_cooling: Add support to calculate static power consumed by cpus
The static-power related stuff had been removed by commit 84fe2cab48
(cpu_cooling: Drop static-power related stuff), but it will still be
used on some rockchip platforms with wide leakage range.

Change-Id: Iee293a6514e0a0407e2d2ab6c3089d6b6d55fd30
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-01-15 19:22:13 +08:00
Finley Xiao
b3038b79f1 soc: rockchip: ipa: Divide ts by 10
Sometimes ts3 is a floating point value, so convert it to an integer
by multipliying by 10 in devicetree.

Change-Id: I3ac6f879e75927e1e551acbfba18148c993b5d26
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-01-15 19:09:47 +08:00
Finley Xiao
d27dca34b7 arm64: dts: rockchip: rk3399pro-npu: Change the parameter of power model
Change-Id: I1ea782fc399261c355f5d2e46c15c3758300c431
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-01-15 19:09:07 +08:00
Wang Jie
515e1f76cb arm64: configs: rockchip_defconfig: set CONFIG_TOUCHSCREEN_GSLX6801=y.
The touch screen driver is for the new rk3368 evb board.

Change-Id: I213a461c956a219ae1969ac30dc23e587d3d723e
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-01-15 18:53:53 +08:00
Wang Jie
afcbdfe85c drivers: input: touchscreen: add gslx6801 driver.
This driver is for the new rk3368 evb board.
static global variable,solve compilation problems.
There are two ways to speed up system startup:
  a.replace msleep() with usleep_range().
  b.enable asynchronous probing.
Modify delay time.

- modify GSLX680_I2C_NAME:
    before: gslx680 driver and gslx6801 driver have the same name,
            causing the kernel to register gslx680 driver failed.
- add power control:
    in gsl_ts_probe() enable power; in gsl_ts_remove disable power.
- fix for none pinctrl
- fix gslX680_ts_worker() error: buffer overflow 'key_x' 512 <= 512

Change-Id: I7d7ae9879397d1850e5cd1092fb2730f6d1fdf18
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-01-15 18:53:15 +08:00
Nickey Yang
ad92b10c0e drm/bridge: synopsys: dw-hdmi: set scrambler bypassed when hdmi1.4
Set resolution to 4K when connect an HDMI2.0 monitor
will enable scrambler feature.
At this time, change to connect an hdmi1.4 monitor will
cause black screen because we do not set scrambler feature bypassed.
So fix this.

Change-Id: Ic14b683719c8234c316dc1cacaa62c72a38e0294
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2020-01-14 21:54:59 +08:00
xuhuicong
ad96f1fe44 drm: bridge: dw-hdmi: disable scamble when tmdsclk less than 340Mhz
to Improve signal compatibility disable scamble when tmdsclk less than
340Mhz by default. and can enable it by define "scramble-low-rates;"
in dts file.

Change-Id: I0bd5d8e2ea4df065d84018615d4c39cac7ac441a
Signed-off-by: xuhuicong <xhc@rock-chips.com>
2020-01-14 21:54:59 +08:00
Wu Liangqing
ae21cc86ab arm64: dts: rockchip: rk3399-excavator-sapphire: set dmc boost to 600m
dmc set SYS_STATUS_BOOST 600MHZ for lpddr3

Change-Id: I6c1905a284ec5986b737a285fb96db19d25f3c96
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-01-14 21:50:31 +08:00
Liang Chen
82dc113a06 cpufreq: interactive: support touch boost and adjust param
Change-Id: I364f16e9cba19ab8617626d4d96d1c8021dd36a3
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-01-14 16:07:48 +08:00
Liang Chen
499810fc0e cpufreq: interactive: fix bug and compile error for the new version
1. The function init_timer_pinned() is removed, use timer_setup().
2. The function kstrtouint() can not work for read target_load, use sscanf().
3. The icpu->irq_work need work on corresponding cpu, so use irq_work_queue_on().
4. max_transition_latency is removed from struct interactive_governor in the new framework.
5. update sample time when idle notify call cpufreq_interactive_update().

Change-Id: I87eb1254e4af622689ede39a14f72bc01dd0b433
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-01-14 16:07:48 +08:00
Viresh Kumar
5a581cc47a RFC: FROMLIST: cpufreq: Add android's 'interactive' governor
https://lkml.org/lkml/2016/9/14/208

Interactive governor has lived in Android sources for a very long time
and this commit is based on the code present in following branch:

https://android.googlesource.com/kernel/common android-4.4

The Interactive governor is designed for latency-sensitive workloads,
such as interactive user interfaces like the mobile phones and tablets.
The interactive governor aims to be significantly more responsive to
ramp CPU quickly up when CPU-intensive activity begins.

Existing governors sample CPU load at a particular rate, typically every
X ms and then update the frequency from a work-handler.  This can lead
to under-powering UI threads for the period of time during which the
user begins interacting with a previously-idle system until the next
sample period happens.

The 'interactive' governor uses a different approach.

A real-time thread is used for scaling up, giving the remaining tasks
the CPU performance benefit, unlike existing governors which are more
likely to schedule ramp-up work to occur after your performance starved
tasks have completed.

The Android version of interactive governor also checks whether to scale
the CPU frequency up soon after coming out of idle.  When the CPU comes
out of idle, the governor check if the CPU sampling is overdue or not.
If yes, it immediately starts the sampling.  Otherwise, the utilization
hooks from the scheduler handle the sampling later.  If the CPU is very
busy from exiting idle to when the evaluation happens, then it assumes
that the CPU is under-powered and ramps it to MAX speed.

If the CPU was not sufficiently busy to immediately ramp to MAX speed,
then the governor evaluates the CPU load since the last speed
adjustment, choosing the highest value between that longer-term load or
the short-term load since idle exit to determine the CPU speed to ramp
to.

The core of this code is written and maintained (in Android
repositories) by Mike Chan and Todd Poyner over a long period of time.

Vireshk has made changes to to the governor to align it with the current
practices followed with mainline governors, like using utilization hooks
from the scheduler and handling kobject (for governor's sysfs directory)
in a race free manner. And of course this included general cleanup of
the governor as well.

Signed-off-by: Mike Chan <mike@android.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

Change-Id: Ib5e8d1dab0fa3cc5ba79b7a554c8dde35435cbdb
[AmitP: Cherry-picked this version from
        https://git.kernel.org/cgit/linux/kernel/git/vireshk/pm.git/log/?h=cpufreq/interactive-idle-notifier.
        Also refactored and folded https://lkml.org/lkml/2016/9/14/209
        patch into this unified patch.]
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
 commit 33f7a05d4e82c81841af20e6a944a4c3f9b2973e)
2020-01-14 16:07:08 +08:00
Liang Chen
8d241dc2e0 Revert "cpufreq: interactive: New 'interactive' governor"
This reverts commit 7af7d04714.

There is new version available on:

https://android.googlesource.com/kernel/kernel/common android-4.9-q
https://android.googlesource.com/kernel/kernel/msm android-msm-coral-4.14-android10-qpr1

So delete the old, then get the new version.

Change-Id: I8b05e8301fa1dc2d9075eec68eb128d618fd3888
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-01-14 16:07:08 +08:00
Todd Poynor
831602a1bb ANDROID: ARM: Call idle notifiers
Change-Id: Id833e61c13baa1783705ac9e9046d1f0cc90c95e
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
 commit f782a94f598ffd024f89ca01778457a6819a9478)
2020-01-14 16:06:17 +08:00
Patrick Cain
18a67d42ad ANDROID: arm64: Call idle notifiers in CPU idle
When CPU idle is enabled, the idle call should also notify the
idle_notifier_call_chain of the change in status. Otherwise some
processes will think the CPU is always active.

CRs-Fixed: 677525
Change-Id: Iabd6f617d6835688cf8b482ac1321e5c1deafffd
Signed-off-by: Patrick Cain <pcain@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
 commit e7f65ab439125bdc29a7a0ca7345ff746d014119)
2020-01-14 16:05:02 +08:00
Amit Pundir
d70f124dea ANDROID: idle_notifier: Add generic idle notifiers
AOSP Change-ID: Idf29cda15be151f494ff245933c12462643388d5
moved x86_64 idle notifiers as generic so that they can
be used in interactive governor.

Upstream change 8e7a7ee9dd ("x86/idle: Remove idle_notifier")
removed x86_64 idle notifiers altogether. This patch add
generic idle notifiers again.

Fixes: android-4.9 commit bfd2a547fc17 ("ANDROID: ARM: Call idle notifiers")
Change-Id: I94a66c74616a4108f4ed49f9afb2447079599f90
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
 commit c2461bc0a4001a35cc3876c62ff27220467efe66)
2020-01-14 16:02:51 +08:00
Finley Xiao
8d482837ab soc: rockchip: ipa: Fix temperature scaling coefficient overflow
Change-Id: I052cf01bd6e881b20667957da6b7781a380de3b4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-01-13 10:52:53 +08:00
Jon Lin
b38f44bb32 spi: rockchip: test: update sys class operation with linux 4.19
Change-Id: I1d5602ab66b357ceca1ade0fb8cbb6c6c5222a92
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-01-10 20:13:08 +08:00
Jon Lin
87ec170ff7 spi: rockchip: add SPI slave support
1.Register SPI slave by spi_alloc_slave
2.Enable SPI slave mode by
    1) add "spi-slave" property to SPI node
    2) enable CONFIG_SPI_SLAVE

Change-Id: I8c44010627b03713468ec2b5ba1a0d95747a1cc6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-01-10 18:34:45 +08:00
Elaine Zhang
942738ec26 clk: rockchip: rk3399: Update the isp clocks
fixed up the isp clk tree change:
    old:
    aclk_isp0-->
            --> hclk_isp1_wrapper
            --> aclk_isp0_wrapper
            --> aclk_isp0_noc
            --> hclk_isp0
                     --> hclk_isp0_noc
                     --> hclk_isp0_wrapper

    aclk_isp1-->
            --> aclk_isp1_noc
            --> hclk_isp1
                     --> hclk_isp1_noc
                     --> aclk_isp1_wrapper
    new:
    aclk_isp0-->
            --> aclk_isp0_wrapper
            --> aclk_isp0_noc
            --> hclk_isp0
                     --> hclk_isp0_noc
                     --> hclk_isp0_wrapper

    aclk_isp1-->
            --> aclk_isp1_wrapper
            --> aclk_isp1_noc
            --> hclk_isp1
                     --> hclk_isp1_noc
                     --> hclk_isp1_wrapper

Change-Id: Icb86b5f87af8a71de5787be3eebe8adcdaf8885e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-01-10 09:27:04 +08:00
Ziyuan Xu
78650ba056 hwrng: rockchip: check for pm_runtime_get_sync() failure
At present there was no check for the return status of pm_runtime_get_sync()
before assess the registers. That would return a failure, such as
-EAGAIN, -EBUSY, -EASSCES, and the access of registers without
enabling the clocks for the rng would trigger a bus exception and kernel
hang.

Change-Id: Id95361dd12ec6a4be2b70f386de721327cbb607c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2020-01-10 09:27:04 +08:00
Wu Liangqing
0de8372dab ARM64: dts: rockchip: rk3399-evb-ind: remove rk809_slppin_rst
fix deepsleep system reboot issue

Change-Id: I20235a476b7c6a764172af72b284ba7b93ce23fa
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-01-10 09:27:04 +08:00
shengfei Xu
3d0909917e mfd: rk808: remove redundant code
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Iabb1f88fba47e0893330bfb36bc909a88d17c26b
2020-01-10 09:27:04 +08:00
Wu Liangqing
4b25615f1b ARM64: dts: rockchip: rk3399-sapphire: fix sdcard not recognized
add supports-sd sd-uhs-sdr104 in sdmmc

Change-Id: I574c12ec5fe39ab704bb0d91512b4ac2b3157076
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-01-10 09:27:04 +08:00
Wyon Bi
7277fc425a drm/bridge: analogix_dp: Mute hpd interrupt if it isn't needed
Change-Id: If6256844a81a417f1f84c43963fbb323a683b106
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2020-01-03 09:49:39 +08:00
Wyon Bi
aceb639de9 drm/bridge: analogix_dp: Workaround async issue between pclk clock and 24m clock
Background:
- EDP software register bank is on the EDP 24m clock domain;
- CPU access EDP software register bank, need to go through EDP APB
  read/write bus and EDP internal read/write bus;
- EDP APB read/write bus is on the EDP pclk clock domain;
- EDP internal read/write bus is on the EDP 24m clock domain;
- Asynchronous logic circuit is added between APB read/write bus and
  Internal read/write bus;

Issue:
There is a bug on the Asynchronous logic circuit between APB read/write
bus and Internal read/write bus; This bug will be random to cause the
following wrong control/address signals sequence happen;
- For write, maybe wrong register address is wrote in;
- For read, maybe wrong register address is read out;

Workaround:
- For CPU write EDP register operation, write any register need
following three steps,
1): Read EDP_BASE+0x00 dummy register firstly, latch the dummy
register address on Reg_Address bus, to avoid next step write to
wrong register to cause function register overrun;
2): 1st time to write the EDP register you want to operate,
to latch the real write address on Reg_Address bus;
3): 2nd time to write the EDP register you want to operate,
to make sure the data is write on the real write address;
- For CPU read EDP register operation, read any register need following
two steps,
1): 1st time to read the EDP register you want to operate, to latch
the real read address on Reg_Address bus;
2): 2nd time to read the EDP register you want to operate, to make
sure the data is read out from the real read address;

Change-Id: I4a87d3883efe94d32ccf8809edb5b9d869670d2d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2020-01-03 08:52:01 +08:00
Cai YiWei
b35d4ec3d7 media: rockchip: isp: remove RKISP_RK3326_USE_OLDMIPI
this is not used, remove it just for code simple.

Change-Id: I884d7cb086e0882dd7f4dd334edc1a8c3c883961
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-01-02 14:26:36 +08:00
Cai YiWei
87184fa353 media: rockchip: isp: rkisp1 rename to rkisp
Change-Id: I7fc332d314a19e09f4e2e8a81ee18fb61b41ee16
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-01-02 13:01:59 +08:00
Sylwester Nawrocki
f851cf76f7 UPSTREAM: clk: Add devm_clk_bulk_get_optional() function
Add managed version of the clk_bulk_get_optional() helper function.

Change-Id: I5071157cbe305a4c512a4fff095e11abd3bb7150
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[sboyd@kernel.org: Mark __devm_clk_bulk_get() static]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 9bd5ef0bd8)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:35 +08:00
Phil Edworthy
6bb407d3fc UPSTREAM: clk: Add (devm_)clk_get_optional() functions
This adds clk_get_optional() and devm_clk_get_optional() functions to get
optional clocks.

They behave the same as (devm_)clk_get() except where there is no clock
producer. In this case, instead of returning -ENOENT, the function
returns NULL. This makes error checking simpler and allows
clk_prepare_enable, etc to be called on the returned reference
without additional checks.

Change-Id: I3d4fa031f94c313f836712d8c3d8177c9eb3f06a
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Russell King <linux@armlinux.org.uk>
[sboyd@kernel.org: Document in devres.txt]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 60b8f0ddf1)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:32 +08:00
Dong Aisheng
836f0eb819 UPSTREAM: clk: add managed version of clk_bulk_get_all
This patch introduces the managed version of clk_bulk_get_all.

Change-Id: If39d1c0c9ef5f68d7433cf9f966894b3669a626c
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit f08c2e2865)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:28 +08:00
Bjorn Andersson
40e14357fa UPSTREAM: clk: Make clk_bulk_get_all() return a valid "id"
The adreno driver expects the "id" field of the returned clk_bulk_data
to be filled in with strings from the clock-names property.

But due to the use of kmalloc_array() in of_clk_bulk_get_all() it
receives a list of bogus pointers instead.

Zero-initialize the "id" field and attempt to populate with strings from
the clock-names property to resolve both these issues.

Change-Id: I6d32388f8cd61b02b99f3c5a4aebb866958415eb
Fixes: 616e45df7c ("clk: add new APIs to operate on all available clocks")
Fixes: 8e3e791d20 ("drm/msm: Use generic bulk clock function")
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lkml.kernel.org/r/20190913024029.2640-1-bjorn.andersson@linaro.org
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 7f81c24265)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:25 +08:00
Sylwester Nawrocki
895be97f13 UPSTREAM: clk: Add clk_bulk_get_optional() function
clk_bulk_get_optional() allows to get a group of clocks where one
or more is optional.  For a not available clock, e.g. not specifed
in the clock consumer node in DT, its respective struct clk pointer
will be NULL.  This allows for operating on a group of returned
clocks (struct clk_bulk_data array) with existing clk_bulk* APIs.

Change-Id: Ia706f1a64515e1c4c6fcbba992da7cee4ed8fe9c
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 2f25528e4e)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:22 +08:00
Dong Aisheng
0391bd5cfa UPSTREAM: clk: add new APIs to operate on all available clocks
This patch introduces of_clk_bulk_get_all and clk_bulk_x_all APIs
to users who just want to handle all available clocks from device tree
without need to know the detailed clock information likes clock numbers
and names. This is useful in writing some generic drivers to handle clock
part.

Change-Id: I5838d4a3ca806ef487a4d8a7d5bab60018e219a2
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 616e45df7c)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:41:17 +08:00
Dong Aisheng
634b160924 UPSTREAM: clk: bulk: add of_clk_bulk_get()
'clock-names' property is optional in DT, so of_clk_bulk_get() is
introduced here to handle this for DT users without 'clock-names'
specified. Later clk_bulk_get_all() will be implemented on top of
it and this API will be kept private until someone proves they need
it because they don't have a struct device pointer.

Change-Id: I2f34ce58a0bc6d70305121dea308f4f34ce0fc2f
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Russell King <linux@arm.linux.org.uk>
Reported-by: Shawn Guo <shawnguo@kernel.org>
Tested-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit cfdc0411cf)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-12-31 15:40:54 +08:00
Caesar Wang
6133c61641 ARM: dts: rockchip: fixes the pwm-cells of pwm3 on rk3288 SoCs
Since the rk3288 used the v2 in pwm-rockchip.c that supported the pwm's
polarity.

So the pwm-cells should be 3.

Change-Id: I68c70bdeefd03ce11559abbd597c5b466a20a8c1
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2019-12-31 15:16:53 +08:00
Liang Chen
74cde84a4b cpufreq: dt-platdev: Add rk3399pro project into blacklist
Change-Id: I71a99c5fd5bc545024281f4a4ff931e5922d2274
Signed-off-by: Liang Chen <cl@rock-chips.com>
2019-12-31 11:59:46 +08:00
William Wu
97251146d2 usb: dwc3: remove rockchip specific glue layer
This patch drops the rockchip specific glue layer which
was used for RK3399 and RK1808. Because the DWC3 Core
has supported the drd perfectly, so we just used the
generic glue layer for most of Rockchip SoCs integrated
DWC3 controller except RK3328/RK3228H.

Change-Id: Ie88f3c06bd8fec5bb7137581519c3a2cbc40e040
Signed-off-by: William Wu <william.wu@rock-chips.com>
2019-12-30 20:14:58 +08:00
Jianing Ren
e992095cb8 arm64: dts: rockchip: disable regulator of usbnet for rk3399-evb-ind
RK3399 EVB-IND Android10 SDK does not need usbnet, so we should close the
regulator of usbnet. However, regulator-always-off is not a correct
property of dts which can lead to xhci die and PM suspend fail.

Change-Id: I8e0ceafd8ee92d78724f423aecb769591716c017
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2019-12-30 17:50:13 +08:00
Jianing Ren
c9b15ba1eb usb: dwc3: core: prevent re-enumeration in host mode
To prevent re-enumeration, we should let PD of dwc3 always on and avoid
reset of dwc3.

However, if we run phy_power_on for u3phy without reset of dwc3, the
operation will failed with error code -110. Therefore, we add another
phy_power_on operation for u3phy when current_dr_mode is host mode.

Change-Id: I92f31de170c7d3d1d8da1d196103763b0cade05b
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2019-12-30 17:50:13 +08:00
Jianing Ren
966da4dbac arm64: dts: rockchip: move resets to the subnode of dwc3 for rk3399
The dwc3 reset operation has been moved to the dwc3/core.c, so we apply
this patch to make the reset operation effective.

Change-Id: I0eb8fb7b4cd1c167fa4c69b177b4a8b6dfe26ef8
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2019-12-30 17:50:13 +08:00
Jianing Ren
bb4c791a42 usb: dwc3: core: add pm runtime for drd mode
In kernel 4.4, we use the extcon notification function in dwc3-rockchip.c
to perform the drd mode switch. Kernel 4.19 implements the same
functionality in drd.c and writes the extcon notification function in
core.c. We use the upstream code implementation process and add runtime
suspend and resume.

Change-Id: I934559f77d2d6b0d3e7a7c09b829d679e7b3dc27
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2019-12-30 17:50:04 +08:00
Wu Liangqing
0041c9c328 arm64: dts: rockchip: rk3399-evb-ind: update lpddr4 dvfs config
Change-Id: I2dd040fdb78facf0384007a8651e85919f799c63
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2019-12-30 08:51:44 +08:00
Liang Chen
e8d786bfa7 cpufreq: interactive: fix bug: do not set pcpu->policy to NULL
Speedchange_task will access pcpu->policy randomly, and the policy
will never be free, so just keep pcpu->policy will be ok even the
governor is stopped.

Fixes: a4524d29de ("cpufreq: interactive: fix race between input event and governor exit")
Change-Id: Icac24a866c6f1aa57fe147396729b02c80798f2e
Signed-off-by: Liang Chen <cl@rock-chips.com>
2019-12-26 21:35:21 +08:00
Ding Wei
268a2edd22 video: rockchip: mpp: rename mpp_dma_session *session
Cause the name of struct mpp_dma_session *session and
the name of struct mpp_session *session, have the same pointer
name, and will be easily mistaken.

Change-Id: I0c50bd1834bcb7c0a59ab6e6fc4bc1136f8a42b7
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2019-12-25 16:51:26 +08:00
Shawn Lin
10d79711b6 ARM: rockchip_defconfig: enable IOSCHED_BFQ
+CONFIG_IOSCHED_BFQ=y
+CONFIG_BFQ_GROUP_IOSCHED=y

For better app launch time when MTP background copy.
		adobe            aiqiyi        facebook
mq-deadline     12s299ms        1m12s382ms     2m31s691ms
bfq             1s389ms         3s492ms	       1s933ms

Change-Id: I449ba410efe09cfaef2598c853fe1c7b6e53dbf4
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-12-25 11:14:16 +08:00
Shawn Lin
3321594c8b arm64: rockchip_defconfig: enable IOSCHED_BFQ
+CONFIG_IOSCHED_BFQ=y
+CONFIG_BFQ_GROUP_IOSCHED=y

For better app launch time when MTP background copy.
                   adobe            aiqiyi        facebook
mq-deadline     12s299ms        1m12s382ms      2m31s691ms
bfq              1s389ms           3s492ms         1s933ms

Change-Id: I9dc269d6c677ffbfb5579925dce8ca2073c26979
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-12-25 10:49:10 +08:00
Jianqun Xu
17e3f1a210 arm64: dts: rockchip: fix rk3399-evb compile error
Fixes: a25827902c ("arm64: dts: rockchip: remove adc-keys from rk3399-android.dtsi")
Change-Id: I8af0e9c747a7dff18005287141da2213dcfe2ebf
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2019-12-25 08:49:08 +08:00
Wyon Bi
bb34dd00f4 drm/panel: simple: support positive/negative driven supply
Change-Id: I0f100f4f6fef67996edbcaa5d24d02ba38c38124
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-12-24 08:29:42 +08:00
Wyon Bi
a406dddaf9 arm64: rockchip_defconfig: enable CONFIG_REGULATOR_TPS65132
Enable TPS65132 regulator driver to support dual output power
supply used in LCD panels for RK3399 M series tablet board.

Change-Id: I8f1c03cc8c99423216da79efdaed23d96ab4c0c2
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-12-24 08:29:14 +08:00