Also return -EPROBE_DEFER for rkvenc when the regulator is not ready,
so that driver can probe again with devfreq until the regulator is ok.
Change-Id: I3bbf51052a8759260715d2aee40ecfe32290bc4e
Signed-off-by: Liang Chen <cl@rock-chips.com>
When dmc is disabled, set rkvdec/venc/npu opp-table to 0
will cause a bad voltage for vdd_logic and system will crash.
Change-Id: Id97f48bceaf18f78c8837d62d5d424e7fc096661
Signed-off-by: Liang Chen <cl@rock-chips.com>
g_frame_interval may be called by interrupt function
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: If0cf7d27edd22108aef0cb15d9f03ee251ad2b8a
camera driver need attributes of rockchip,camera-module-xxx
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I96863ae665b825328752979035fba665c5baf4aa
BUS_OFF_INT is BIT(9), so 'isr' and 'isr_int' should NOT be u8.
Also err_int should add BUS_OFF_INT.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Change-Id: I7462bb68ca6a710c0b72179cc5440fce7067a0e8
only force to update address at stream on.
force update enable during mid-frame will be error.
Change-Id: Ia521a5f70cdd0366d667ea915abbf463df022a22
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
When rk3588 rkvenc2 encoder encoded H.264 with width exceeding 4096
and slice flush bit is enabled hardware will occasionally timeout
without interrupt.
So we need to disable slice flush bit on this case.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ia9ccb959bd11fbdaf845c3608c15a7491b78eeee
Note that there is not any widget implemented on rk809 yet,
adding audio widget and routing properties will result in
failure on audio card initialization.
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I2ebf322fc6530bed968697086305793db466ea6e
1: enable CONFIG_EXTCON for usb
2: enable CONFIG_PHY_ROCKCHIP_CSI2_DPHY/CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY for display
3: enable CONFIG_VIDEO_ROCKCHIP_CIF/CONFIG_VIDEO_ROCKCHIP_RKISP1 for camera
4: enable CONFIG_ROCKCHIP_MPP_RKVDEC/CONFIG_ROCKCHIP_MPP_VDPU2/CONFIG_ROCKCHIP_MPP_VEPU2 for mpp
5: other sync from linux-4.4
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: Iee7a5d7445e3c70178bfab1c81a7b94878a9070a
HDMI has compatibility problems when the HDMI PHY VDD is set to
the nominal 0.75V. On some televisions, signal may be no recognized
when switch resolution. After actual testing, raising voltage up
to 0.8375V can solve the compatibility problems such as no signal.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I217ad22e844c2526ebbc2fcb38f11c04ae4dcd51
NOTE: rk3588 use link table to config hardware and can not get accurate
timing on task finished.
The task timing of irq and isr is combined together.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I3469fb56145de1929c41b6a3e9fb43d88003daa3
There is a bug in the HDMI controller DDC. The falling edge of
SDA and SCL almost coincide and cannot be adjusted, resulting
in poor compatibility of DDC. The compatibility of DDC can be
improved by increasing the driver strength of SCL and decreasing
the driver strength of SDA to increase the slope of the falling edge.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ia7e70c3a8f7f3ee5e36f401919e36d045448250c
Now a fixed regulator is supplied by another fixed regulator, the parent
should probe first to avoid a defer-probe error.
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I46b616e677bd0daf66a83004923a8d73f1c7b5fb
Now a fixed regulator is supplied by another fixed regulator, the parent
should probe first to avoid a defer-probe error.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I0d4d5c74b242cce9ec55268f050579be3778bee7
Dump irqs in one second when hard lock or rcu stall, panic and so on.
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ia35d02eef17055bf4f793b72a11c4b7711d81972
1.support alloc buffer from reserved mem of thunderboot
size of one frame = ceil(w*bit/8/256)*256*h
2.support read back mode change to online mode
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I6b4ba18401edcb220ae6e9174afd5a92bfdd31c5
