As the opp voltage may be changed if enable pvtm, it's better to use
rockchip,high-temp-max-freq.
Change-Id: If480a6ffa23efa9213b3b809f3cde320ce2a5ddd
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change the maximum frequency of cpu to 1104MHz.
Change-Id: I4dddd81907dc3bb7dd55c0a8eda41b16990ca203
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Add support for rk3308bs v11 board whose maximum voltage is 1336000uV.
Change-Id: I14474838d4341c8f146a503486c7005f386c1475
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This change adds usb otg/host controllers and related phy nodes
on rk3308 SoC.
Change-Id: I5fd3acc44614cc3fcb58eb269c2e559ea24ab0f1
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
IP vendor suggest that enable pop sound when enable hpout,
and disable it after disable hpout.
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I01f03de8c4859faa4d8966440e8d2dcfa53c8da4
The AGC may bring non-linear ADC processing, that makes it
difficult for back-end audio algorithms to use NLP, so we
usually turn them off.
In addition, it seems too many controls and easy to confuse,
let's remove them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: If17387b0db055942acf1d7e9a5b8b6b9057f1c78
And clean up the brackets of macro variables.
The DAC_DIG_CON04 is conflict with RK3308BS and RK3308/RK3308B,
let's fix it.
Using large driver strength for HPOUT and LINEOUT for RK3308BS Codec.
keep DAC mclk enabled for RK3308BS codec version.
Since the new process version optimizes the design of the clock,
part, we need to enable DAC mclk during codec detect headphone.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I0617049c9ed494ba17c1d548413e49355c9bf01f
rk3308_platform_probe() should call device_unregister() in error path.
Otherwise, the memory of dev will free without unregister. Kernel will
panic when reboot.
kobject: '(null)' (ffffffc01e94a830): is not initialized,
yet kobject_get() is being called.
[<ffffff80081e8f6c>] kobject_get+0x30/0x80
[<ffffff800829c110>] get_device+0x14/0x24
[<ffffff800829e044>] device_shutdown+0x84/0x1a8
[<ffffff80080b265c>] kernel_restart_prepare+0x34/0x3c
[<ffffff80080b274c>] kernel_restart+0x14/0x5c
[<ffffff80080b2a9c>] SyS_reboot+0x1a0/0x1bc
[<ffffff8008082f30>] el0_svc_naked+0x24/0x28
Change-Id: I8eb838deb3b540792f63124365bf821f7ee15649
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This configuration is required for Gen1 l1ss support.
Change-Id: I921d1551dbbb4e85f823ce9ce0abbb96198d2ccf
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The application logic is ready to have reference clock removed through
either L1 PM Sub-states or L1 CPM.
Change-Id: I1622416fcff716b2b342746fb3f93f61d4092101
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Descripted in drm_gem_object structure description:
* Reference count of this object
*
* Please use drm_gem_object_get() to acquire and drm_gem_object_put_locked()
* or drm_gem_object_put() to release a reference to a GEM
* buffer object.
*/
struct kref refcount;
It's better to release object by drm_gem_object_put.
About the refcount for object of drm device,
rockchip_gem_create_object -> refcount = 1
drm->driver->gem_prime_export -> refcount = 2
This patch will decrease a refcount from export, and decrease another
one in rockchip_drm_direct_show_free_buffer:
drm_gem_dmabuf_release -> refcount = 1
rockchip_drm_direct_show_free_buffer -> refcount = 0
Tested by rockchip_drm_self_test.c.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I812770ed832d71121aab5212d62b96815cbe2d68
