In the same way of
commit 697aafe93f ("MALI: bifrost: rk: do not use deferrable work for poweroff")
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I061ca478f4e8f8a836ce3996a138b1d0382cfd2b
If the layer pass through layer mix is unused, we need to disable alpha,
at this time, the layer mix only used to transfer alpha to next mix.
Change-Id: Ibd469b4fb61b41480297bc20c346e9ceefa61fc7
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
To use tsadc_shut_m0 function, tsadc must switch to cru_shut_mode,
because tsadc_shut signal have to go through the cru to get to tsadc_shut_m0 signal.
Refer to "10.10.10.81\技术文档\thermal\rk3568_tsadc_shut.png" for details.
Change-Id: I0528917efe2f5ea6f002ebf1608815eb01f552c0
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This is for mipi dsi on rk356x: there
is a hold signal from mipi dsi to
vop.
Mipi dsi may trigger the hold signal
when send dsi command or switch between
video mode and command mode.
vop may run into an unexpected situation if this hold
signal is rise when vop is running.
So when mipi dsi switch between video mode
or command mode, or send a dsi command, it
should set vop in stanby state.
Change-Id: I80e456d3416518436045ae8e0eec215c22b111a3
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The f_uac1 use ep address 0x81 and 0x01 for set sample rate,
so it can only support uac1 ep1-in and ep1-out to set playback
and capture sample rate, it has limitation for USB composite
device (e.g. RNDIS & UAC1). This patch use in_ep->address and
out_ep->address instead of the fixed addresses.
Change-Id: Ie2c70e2c2ec89fb66b00cd2a64928b50ee0541cc
Signed-off-by: William Wu <william.wu@rock-chips.com>
Rechange the emmc aliase to mmc2 to be same as other rockchip's chips,
so the android application can process the emmc property of all chips
in a uniform manner.
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: Ia092ec08552e360e7fc5dc271dbb69edc08bd486
Rechange the emmc aliases to mmc2 to be same as other rockchip's chips,
so the android application can process the emmc property of all chips
in a uniform manner.
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: Id1bbd8c63f919eb13cd7b511e9afe885753d99f5
Solve the problem of insufficient power supply voltage of
USB peripheral
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: I7e06b463a2da567fcf8fa2fc641379d9274ed549
The drm core will disable than enable a crtc when is marked as
connectors_changed.
But when we attach a writeback connector to a running
crtc, we really don't need this disable/enable, which
will black a running screen.
Change-Id: I636615f27424bc60496ffc487c218f60fb95d719
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
According test, if sensor output 2mux mode, cif needs to be
configured BT656_1120_MULTI_ID_MODE_2, nor no interrupts will be
triggered. So BT656_1120_MULTI_ID_MODE_2 & BT656_1120_MULTI_ID_MODE_4
is different, distinguish it.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I8e1959131708d2cab87ab086e03023a718f5b807
the poweroff work contains an operation to release the gpu
wake_lock, sometimes, the deferrable work can cause the gpu
wake_lock to be delayed for tens of seconds before release,
the device can not into deepsleep, resulting in increased
power consumption.
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I49aba25cfc000739f344420f818c91b382926e6e
Donot pull up BT uart pin before rtl87xx power on.
Signed-off-by: Longjian Lin <llj@rock-chips.com>
Change-Id: I562e4c403f2a56f9253ff677d78d9056cd98a54d
As per UAC1.0 spec Table 4-2: Class-Specific AC Interface
Header Descriptor, the baInterfaceNr(n) are indicated the
interface number of each AudioStreaming. So it needs to
set the baInterfaceNr dynamically according to the interface
IDs allocated by the usb gadget core.
Change-Id: I57cc7b0070fb166aac4360262b2a7e6f2f5df6e1
Signed-off-by: William Wu <william.wu@rock-chips.com>
When system reboot, drm framework will set mode to
prefer mode first then set mode to 0. Clearing flag
in encoder enable will causes the VOP to not set
the sync polarity.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I20dfcc7b6dc76faf903b42620454a7f5071bd3e3
For resolution floating refresh rate such as 59.94 Hz,
the only difference between the resolution and its
corresponding integer refresh rate resolution is the clock.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I149471f58c9eb65f972139b23a45339ea8807e54
1. Add mpp_dev task capacity and default is 1.
The task capacity is the task queue length that hardware can accept.
Default 1 means normal hardware can only accept one task at once.
2. Attach mpp_dev to mpp_taskqueue for status probe. The task queue
capacity is the minimum task capacity of all the attached mpp_dev.
Change-Id: I8cafe806ec9399902237418d2bbcb088240ed415
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
There are some clks(uart) that do not have to comply with the 20 times
fractional divider limit.
Change-Id: I420d8ba3b5de65d9e0ea74920d5ea8450ae94465
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The RK356X DWC3 supports to set the USB 2.0 PHY enter
suspend mode if the DWC3 core suspend conditions are
valid (as per DWC3 controller databook 6.3.46 GUSB2PHYCFG
register bit6). This cause xHC driver failed to send
USB resume signal to USB 2.0 device in xhci_bus_resume().
This patch adds a quirk "xhci-u2-broken-suspend" to force
the xHC to set the link state to XDEV_RESUME and send USB
resume signal to USB 2.0 device.
Change-Id: I24c017867f80728890c0562a12e4554625913e67
Signed-off-by: William Wu <william.wu@rock-chips.com>
