As enable the releated config, hit the below error:
drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c:937:34: error:
assignment to expression with array type
timings->exposure_valid_frame =
...
and
drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c:963:34: error:
assignment to expression with array type
timings->exposure_valid_frame =
....
Change-Id: I4381cc8aa00bb6a968c01d7537a8942b5715fa5c
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Base on the evb board, the mode of RMII REF_CLK need to be setup for input.
Change-Id: I06220d3422835a456b5567d7797a008d313e185a
Signed-off-by: David Wu <david.wu@rock-chips.com>
Need to setup the speed setting for 10/100, otherwise the gmac can't
work.
Change-Id: I92a410b7b453e145fecc817841eecc54afca4051
Signed-off-by: David Wu <david.wu@rock-chips.com>
pwrkey node is necessary for U-Boot RK817/RK809 pwrkey driver,
because the device-driver model requires it to make a match.
Change-Id: Ica766232646ba93508592ab1a20b65157859d688
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
For 3328, inno hdmi phy post pll is enabled by default, it's need to
manual power down post pll if uboot logo is not shown.
Change-Id: Ia175ff0aad006be950b8bc13e1cf2ecb4f00e04c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
now shutdown function just wait for vpu finishing his work,
and do nothing else.
Change-Id: I54f227768314edd85154705d07054bd493e350aa
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
If show logo in uboot, can't change vop clocks.
Change-Id: Ia149b452e16dedcafaa15bfa5d5dc989b06737ff
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Make the printks look a bit nicer by adding a prefix.
Change-Id: Id268a55a1681c6805e7c3f5929350891e92df816
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
distinguish MIC input differential or single-ended
disable DAC_D_HPF
add pdm support
Change-Id: Id2befb3f817c9eaf273e1120036cf013db463639
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
This solve failed to linkup for very few chip
This can reduce udp package lost rate sometimes
Change-Id: I684d9ea974e56478e7906c6e79c4c8505c042823
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
Just follow the convention of fixing for DTO timeout.
Change-Id: I753b5a6f2ab409e58c83a59212592f3b430b018a
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
1. adjust vdd_logic to 950000uV.
2. adjust vdd_arm to 950000uV.
3. set vdd_10 on.
4. set vcc3v0_pmu on.
Change-Id: I1af72ccbc615f6bdcb59f51ac6ea54e8c3bfe2af
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
remove the 'regulator-always-on' property from vcc3v3_lcd
Change-Id: I056601ed575b993065c17d245195bd376808bbed
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
If change parent to alternate parent and the old parent clock speed is less
than the clock speed of the alternate parent, add dividers first and then
select alternate parent.
If change parent to primary parent, select primary parent first and then
remove dividers.
Change-Id: Ib82de9a936effe5c885639799f3bb5629dc89f8d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The gpll clock has not yet been created when its children do enable and
prepare in cru critical talbe, so move its children into pmucru critical
talbe that the gpll clock has been created before its children do enable
and prepare.
Change-Id: If5243326bf1d3c926bb1bb12e56e4b9fc9282762
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If xin32k use the rk808_clkout1, rk808 init is too late,
xin32k enable count and prepare count is not match with it's child clk.
Change-Id: Iec5d1f91b2289b18f41b4d915e6859154a5b7635
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
It needs to contains rate and mux clk for gpu composite clk, so that
the clk_composite_set_rate_and_parent function can be called.
Change-Id: I9818df2adbbcf40f616d2ca230cd83ea1ef2c14f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If the regulator is shared between several devices then the lowest
request voltage that meets the system constraints will be used.
Change-Id: Icb6afcb571bddd6709d352dfad8fc2da80567bc0
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If there is only one opp whose frequency is equal to the initial value
in opp table list, the GPU voltage domain will keep the initial voltage,
it may be too large.
Change-Id: If2ae1c876de185d810e05296b1b9e98855c3ef48
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
drivers/regulator/syr82x.c:451:3: warning: this if
clause does not guard... [-Wmisleading-indentation]
Change-Id: Ibdb1f6f903d1e0dece7b58aa3ec89d075e6d5b79
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
drivers/input/touchscreen/cy8c_touchpad.c:77:20: warning: xfer_msg[1].flags
is used uninitialized in this function [-Wuninitialized]
Change-Id: I2d1f199f098b38af92037e2ebbd63c05fc4a1f35
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This patch adds the function of mipi-dphy TX1RX1 for RK3288, the
mipi-dphy TX1RX1 is matched when "txrx_base_addr" is valid.
Change-Id: I01640925157a7082e942188b29f6bbf1318cf3d5
Signed-off-by: Wen Nuan <leo.wen@rock-chips.com>
