due to function will be called from rk_headset_irq_hook_adc.c
when es8316 configured in defconfig file but not in device tree
Change-Id: Ie0294fff2c05b9f77c6740d81dc9445007c1b62b
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
We could find the external abort for trying to access
nvme's BAR space to check the csts, but it's possible
that the link state is forbidden to access the BAR when
failing to reset it. So we should reuse the former csts
to print the log instead of doing that again.
Change-Id: I34438a726381e588eb21149b1aab76a66ef0e665
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
When dwc3 core enters into suspend mode, the PD may turn off
for power saving, which will cause dwc3 controller lost the
mode operation when resuming time.
This adds redo the mode setting into dwc3_core_init() function
to avoid this issue.
BUG=Redmine: Defect#110481
TEST=rk3399-sapphire-excavator-box(CVTE), check if USB3.0 HUB
can be enumerated after PM resume.
Change-Id: I61c512e9c368afc665cd4d5900367079ed22a34e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Usb-controller can invoke phy_power_on/off in its suspend/resume
process, so usb-phy need not do it again.
This adds remove phy_power_on/off in its suspend/resume cases.
Change-Id: Ice30e79ffba8116ca9bfae344c7ea232f6580130
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
DWC3 use extcon notifier to manage USB cable detection
and mode switch. For host mode, if USB device connected,
it requires to reset the whole DWC3 controller to make
sure that pipe power state in P2 before power on USB3 PHY,
after do DWC3 reset we will do phy power on in extcon evt
work, however, the DWC3 core will do phy power on again
in runtime resume process (dwc3_runtime_resume() ->
dwc3_core_init() -> phy_power_on()). This will cause PHY
power off failure during suspend because we just do once
phy power off in suspend(dwc3_suspend() -> dwc3_core_exit()
-> phy_power_off()).
This patch does phy power off in suspend to make sure that
USB2 PHY enter suspend in HOST mode. And because USB3 PHY
power on operation need to be done while the pipe is in P2
state, but after resume the pipe is in P0 state, so we just
put USB3 PHY in power on state.
Change-Id: I643ba0abeb015be9285fd29d59fa0e006131c39b
Signed-off-by: William Wu <wulf@rock-chips.com>
One basic condition of usb remote wakeup is vbus on, so we add
regulator-always-on property for vcc5v0_host regulator in this adds.
In the previous codes, ehci/ohci-platform did not power off
vcc5v0_host regulator due to some oddish codes, and we have fixed it
at commit b5a0a9e8794d.
Change-Id: I95c225c9c3aeec6e346d62e61fdcde5e5e02d143
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
when info change, vpu driver doesn't know when to release
buffers. with this mechanism, vpu driver will auto release
when buffer nums bigger than BUFFER_LIST_MAX_NUMS.
Change-Id: Id4fb91257d260bfd2e18388731941c4f0cc191b0
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Since fd will be reused even if dma buffer doesn't release,
this will cause output buffer error when use usb camera
with mjpeg or h264 format.
Change-Id: I2baeb2c5d9127df0a0eb362b8c577c05ceca470d
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
when step into runtime_suspend, i2s pd will be disabled and loss state.
so need to restore register when runtime_resume.
Change-Id: Ie37aba46f6ee21be2af404da24ba667e3ca86d6c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
(cherry picked from git.kernel.org broonie/sound.git topic/rockchip
commit f0447f6cbb)
Add a node for the cdn DP controller which is embedded in the rk3399
SoC.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Change-Id: I253bb9b9d6c1b8a407f7c49503ec666bb8b64d4d
Use HDMI connection / disconnection notifications to update an ALSA
jack object.
Change-Id: Ia18537be1ddb899b7ac490560bf91d7de83eae02
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Use HDMI connection / disconnection notifications to update an ALSA
jack object. Also make a copy of the ELD block after every change.
Conflicts:
sound/soc/codecs/Kconfig
sound/soc/codecs/hdmi-codec.c
(am from https://patchwork.kernel.org/patch/8887251/)
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Change-Id: I5f4a931c3b91c2b230ce5a61b60f191628d93105
This is Russell's HDMI notification prototype [1], currently waiting
for the HDMI CEC situation to resolve.
The use case for the notifications on MediaTek MT8173 is to let the
(dis)connection notifications control an ALSA jack object.
No Signed-off-by since this is not my code, and still up for discussion.
[1] https://patchwork.kernel.org/patch/8351501/
(am from https://patchwork.kernel.org/patch/8887261/)
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Change-Id: I87daa156de6cfa7ff8db9df9d8ecc8c42d76798f
If the driver is in suspended mode, the dp block may be disabled, and
chip registers may not be accessible. Yet, the worker may be triggered
in this situation by an extcon event. If that happens, the following crash
will be seen.
cdn-dp fec00000.dp: [drm:cdn_dp_pd_event_work] *ERROR* Enable dp failed -19
cdn-dp fec00000.dp: [drm:cdn_dp_pd_event_work] Connected, not enabled. Enabling cdn
Bad mode in Error handler detected, code 0xbf000002 -- SError
CPU: 1 PID: 10357 Comm: kworker/1:2 Not tainted 4.4.21-05903-ge0514ea #1
Hardware name: Google Kevin (DT)
Workqueue: events cdn_dp_pd_event_work
task: ffffffc0cda67080 ti: ffffffc0b9b80000 task.ti: ffffffc0b9b80000
PC is at cdn_dp_clock_reset+0x30/0xa8
LR is at cdn_dp_enable+0x1e0/0x69c
...
Call trace:
[<ffffffc0005a7e24>] cdn_dp_pd_event_work+0x58/0x3f4
[<ffffffc0002397f0>] process_one_work+0x240/0x424
[<ffffffc00023a28c>] worker_thread+0x2fc/0x424
[<ffffffc00023f5fc>] kthread+0x10c/0x114
[<ffffffc000203dd0>] ret_from_fork+0x10/0x40
Problem is two-fold: The worker should not run while suspended, and the
suspend function should not call cdn_dp_disable() while the worker is
running.
Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
(am from https://patchwork.kernel.org/patch/9442149)
Change-Id: Ic01c6f793281a47c36a90c1be34a5e479ebabb3e
If no monitor is connected, suspend/resume cycles result in firmware
load errors because the driver attempts to load the firmware while
the system is in suspend state. This results in a kernel warning and
traceback.
Loading the firmware during boot fixes the problem. Note that we can not
just call schedule_work conditionally in cdn_dp_pd_event() if the insertion
status changed. The problem would still be seen if a monitor is connected
for the first time during suspend.
(am from https://patchwork.kernel.org/patch/9442145)
Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Change-Id: I86eb7c41624be1a8f5952ba7709e623a70941b8c
This commit is for fixing some error, according to the comments from
CL:5442
1. correct the use of rate
2. remove the phy switch from DP driver, it is controlled in PHY driver
3. add some const keyword
4. clear int_mask to 0
5. modify spelling errors
Change-Id: I239a9e7183593b85485abb6d288d6cb1558c65f7
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Add support for cdn DP controller which is embedded in the rk3399
SoCs. The DP is compliant with DisplayPort Specification,
Version 1.3, This IP is compatible with the rockchip type-c PHY IP.
There is a uCPU in DP controller, it need a firmware to work,
please put the firmware file to /lib/firmware/rockchip/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Change-Id: I64aee564f782db9943a92ca07cb20e2111d7921f
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
[seanpaul fixed up some races between the worker and modeset]
[seanpaul squashed ~15 commits from chromium.org gerrit]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[groeck fixed compilation errors when building as module]
Signed-off-by: Guenter Roeck <groeck@chromium.org>
(am from https://patchwork.kernel.org/patch/9442143)
We decide to back to old vcodec driver until getting a better v4l2 solution
Change-Id: Iec3f5b3aba86866a0b0fc7aab5b6c2b28bc268d9
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
we will use rga to speed xserver and wayland.
Change-Id: Ic975b1bbeb6afd8a3a15ba41afc1d8ff10c6d3b4
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
In ehci/ohci-platform, phy_power_on() gets called twice at probe time,
one is at pdata->power_on(); another is in usb_add_hcd(). However,
phy_power_off() is only invoked one time when ehci/ohci-platform goes
to PM suspend. As a result, the phy power count become inconsistent.
This adds assigned phy phandle to hcd-phy at ehci/ohci-platform probe
time to prevent hcd invoking generic phy methods again when phy-cells
is 0 in DT.
Change-Id: I2f0cca622d31a46dea0b805b83b676cc78e4d67c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Per the errata of TRM, rk3399 won't support gen2 from
now on, so let's set max-link-speed to 1 in order not
to doing training for gen2.
Change-Id: I3fd455dc2427f2c67dc2dce8e8fabc4b521a49dd
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
If validity is not checked prior to clock rate change, clk_set_rate(
cpu_clk, unsupported_rate) will return success, but the real clock rate
change operation is prohibited in post clock change event. Alough post
clock change event will report error due to unsupported clock rate is
set, but this error message is ignored by clock framework.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Tested-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(am from mmind/linux-rockchip.git branch v4.10-clk/next
commit a554bb5fb0)
Change-Id: I521700f86fe1d9bf2d1bef4ebe0350cd6f558c0a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Edp controller support get timing from edid, so we can simple use
a dummy panel for display, so bootloader and kernel all can use same
timing from edid
Change-Id: I0cf19817aa1c38cae25603814c3605e6c16fe0f6
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
