Commit Graph

602986 Commits

Author SHA1 Message Date
wlq
68f8d696e6 arm64: dts: rockchip: add dmc default config for rk3399
Change-Id: Iaeacb92a560743ff6dcf1f3977449004fa256992
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2017-08-17 10:44:28 +08:00
Xu Xuehui
3de8752a4e net: wireless: rockchip_wlan: add network wakeup function for rtl8723bs
wifi driver open config such as below:

CONFIG_WOWLAN = y
CONFIG_GPIO_WAKEUP = y

Change-Id: I9bdb07e0210c68993bb638aa2ca403142e180c5f
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
2017-08-17 09:26:43 +08:00
Zhangbin Tong
210e0ef438 firmware: rockchip: add rc config interface
Change-Id: I3d769761f58c51fb366e99b62cf27a5974e511a1
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-08-16 18:32:11 +08:00
Frank Wang
b5bb4868b8 phy: rockchip-inno-usb2: put phy-port into suspend during probe
Let us put phy-port into suspend mode at initialization time for
saving power consumption, and usb controller will resume it during
probe time if needed.

Change-Id: Id3a66af8ff17612d54fbc80db087bf67eaee7726
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-08-16 18:30:11 +08:00
Marek Szyprowski
3b4dbd5b83 UPSTREAM: dma-buf: add support for compat ioctl
Add compat ioctl support to dma-buf. This lets one to use DMA_BUF_IOCTL_SYNC
ioctl from 32bit application on 64bit kernel. Data structures for both 32
and 64bit modes are same, so there is no need for additional translation
layer.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1487683261-2655-1-git-send-email-m.szyprowski@samsung.com
(cherry picked from commit 888022c047)

Change-Id: I6e80fb34c3915f9b77be432947c8ddd1ecfd221f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:43:45 +08:00
Mark Yao
5f98c9f6ff drm/rockchip: vop: set BCSH propetries default
Change-Id: Ib8ce044525cb611c8d6df2207c12fb51bb74460b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:39:55 +08:00
Mark Yao
e268caad71 drm/rockchip: vop: add BCSH support for full vops
The full name of BCSH is Brightness, Contrast, Saturation and Hue.
BCSH is supported on all full vop designed.

Change-Id: I17bcd5a07b93b3c68aa892606f886bcd3a7673a0
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:38:48 +08:00
Boris Brezillon
2272eb5d62 UPSTREAM: drm: Add TV connector states to drm_connector_state
Some generic TV connector properties are exposed in drm_mode_config, but
they are currently handled independently in each DRM encoder driver.

Extend the drm_connector_state to store TV related states, and modify the
drm_atomic_connector_{set,get}_property() helpers to fill the connector
state accordingly.

Each driver is then responsible for checking and applying the new config
in its ->atomic_mode_{check,set}() operations.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 299a16b163)

Change-Id: I50d7c79013235d75972b8cdd46cf89bbd9cf596d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:38:28 +08:00
Boris Brezillon
777d56231f UPSTREAM: drm: Turn DRM_MODE_SUBCONNECTOR_xx definitions into an enum
List of values like the DRM_MODE_SUBCONNECTOR_xx ones are better
represented with enums.

Turn the DRM_MODE_SUBCONNECTOR_xx macros into an enum.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit dee7a4fee7)

Change-Id: I02d7856d2d933caeb39c0bb64ad4dee946493843
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:38:06 +08:00
Mark Yao
c2560f2894 drm/rockchip: create tv properties on master driver
Change-Id: Ia42a89447281e1f2688ce34d4c0a85975222b371
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:37:44 +08:00
Mark Yao
18a51606e2 drm/bridge: dw_hdmi: add module info for hdcp driver
Change-Id: I458974b7d8b925902d0f0d41364f80881a07c6c7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-15 18:37:16 +08:00
Finley Xiao
c4ec95f7de arm64: dts: rockchip: rk3368: add prefix 'rockchip,' for leakage property
Change-Id: I1cf285eb99c309a2b5b7f886872bb3ff3bc7648a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-08-15 18:36:39 +08:00
Finley Xiao
b71acedbdf arm64: dts: rockchip: rk3399: add cpu pvtm voltage table
stress test:
1. reboot
2. antutu, use governor performance
3. antutu, use governor interactive
4. Thomas-sRoomIII, use governor interactive
5. Thomas-sRoomIII, use governor userspace and sweep frequency

Change-Id: If12d2bd72ce3bba01021314265eba4f83a0072e1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-08-15 18:36:23 +08:00
Finley Xiao
22b9a07e7d cpufreq: rockchip: Add support to select voltage according to pvtm value
At same voltage and frequency, the greater the PVTM value, the lower
the OPP's voltage. In order to reduce power consumption, it is necessary
to adjust OPP's voltage according to PVTM value.

Change-Id: Ic1d2a74048f6c7d97d92868292f14776ea380d99
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-08-15 18:35:48 +08:00
zhangyunlong
42d1f377e2 camera: rockchip: camsys_drv v0.0x22.3
switch TX1/RX1 D-PHY of rk3288/3399 to RX status before it's
initialization to avoid conflicting with sensor output.

Change-Id: I672730fe5fb5a33b8437df1ae61078a9a79ac41b
Signed-off-by: zhangyunlong <dalon.zhang@rock-chips.com>
2017-08-15 09:41:24 +08:00
Zhangbin Tong
097d93c71f ARM: dts: rk3288-android: enable the nandc node by default
Enable the nand node by default in the android dtsi as
they're wired on every board for drmboot compatible.

Change-Id: I63aea9be6ca43fb91f7ec6616f5b9051ca5c23a8
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-08-14 17:11:08 +08:00
Yankun Zheng
38c57424d4 power: charger: add new sy6982c/sy6982e driver
Change-Id: I3204b34234194d4a17ae0b2141744dbdbe5c4daa
Signed-off-by: Yankun Zheng <zyk@rock-chips.com>
2017-08-14 16:54:14 +08:00
algea.cao
fa03347549 arm64: dts: rk3368-r88: support rk3368 drm cvbs
add rk1000 node and enable lvds. 3368 RGB output depends on lvds.

Change-Id: Ie1636878fc741338466a437864aa5c3b912170eb
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2017-08-14 16:44:53 +08:00
algea.cao
b0520612e2 arm64: rockchip_defconfig: enable rk1000
add mfd rk1000-core and drm bridge rk1000-tve.

Change-Id: I0c030f2f90eab1242af44c39bea1af7a1870f3fe
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2017-08-14 16:44:03 +08:00
algea.cao
83f1c1d9ac drm/bridge: support rk1000 tv encoder
RK1000 is a digital-analog mixed chip which has tve output function.
RK1000's registers can be written and read through I2C interaface.
Because RK1000's I2C need dclk and mclk, RK1000 TVE should be registered
after RK1000 CORE. RBG signal output is controlled by LVDS, so RK1000
should be registered as connector and attach LVDS encoder.

Change-Id: I65b40826bd1dbf07d4fa94ecdf8c75005008731f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2017-08-14 16:43:08 +08:00
algea.cao
bce841cc7f mfd: rk1000: update mfd rk1000 core driver
RK1000's control register block need mclk for i2c communication.
So mclk should be enabled in advance.
RK1000's control register block should be registered before RK1000
TVE.

Change-Id: Iba9a2a410fe927666072f8d246995462a860ec3a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2017-08-14 16:42:57 +08:00
Xu Xuehui
98b4237c7d net: wireless: rockchip_wlan: update bcmdhd driver to 1.363.59.144.10 (r)
1. Fix disconnect issue during system suspend
2. Add more module support
3. fix read country code from config
4. modify config.txt reading behavior

Change-Id: Ib6392523752d9af60329df0dd810ceb8b76467ff
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
2017-08-14 16:19:38 +08:00
Laurent Pinchart
fcb60baab3 UPSTREAM: drm/bridge: Make (pre/post) enable/disable callbacks optional
Instead of forcing bridges to implement empty callbacks make them all
optional.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit c8a3b2ae07)

Change-Id: Id37cbb6114e69957dfd6b72c8bd7b66dcc6f0590
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-14 14:57:20 +08:00
Mark Yao
2ab91f190d drm/rockchip: vop: fixup error handle on crtc register
Change-Id: I969a3994360331f4ce66e7affcc9ed3869599777
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-14 11:47:04 +08:00
Jeffy Chen
2169a9db46 UPSTREAM: drm/rockchip: Reorder drm bind/unbind sequence
Current drm bind/unbind sequence would cause some memory issues.
For example we should not cleanup iommu before cleanup mode config.

Reorder bind/unbind sequence, follow exynos drm.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
[seanpaul fixed spelling typo in commit subject]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-11-git-send-email-jeffy.chen@rock-chips.com

(cherry picked from commit ccea91998c)

Change-Id: I8571a34419735f8b8a51666b31b91cbdb18250bd
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-14 11:47:03 +08:00
Mark Yao
8ecd10c962 drm/rockchip: backlight: fix modules compile error
Fixes:
error: redefinition of 'rockchip_drm_backlight_update'
error: redefinition of 'of_rockchip_drm_sub_backlight_register'

Change-Id: I4eeebc6075387f720acec597cee765e2a1a83b7c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-14 11:47:02 +08:00
Mark Yao
abc940812c drm/bridge: analogix: fix modules compile error
sync to upstream commit:
  3424e3a drm: bridge: analogix/dp: split exynos dp driver to bridge directory

fix following modules compile error:

ERROR: "analogix_dp_enable_video_mute" [drivers/gpu/drm/bridge/analogix/analogix_dp_core.ko] undefined!
ERROR: "analogix_dp_config_interrupt" [drivers/gpu/drm/bridge/analogix/analogix_dp_core.ko] undefined!

Change-Id: I340d82f238485617604afd44047644adc9620f47
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-14 11:47:01 +08:00
Feng Mingli
f4adf1bc37 usb: dwc_otg_310: pcd: hold wake lock until phy suspended and clk disabled
When begin connecting to PC in device mode, the driver will hold a
wake lock to prevent system from entering deep sleep. If it fails
to connect to PC or doesn't detect the vbus, the driver will suspend
usb phy and disable usb clk, and release the wake lock.

If unlock the wake lock first, system may enter deep sleep before
suspend usb phy and disable usb clk. Then wake up system by pull
out the usb cable, it may cause usb interrupt abnormal.

TEST=rk3126c connect the usb charger into the charging interface,
after the system entered deep sleep, pull out the usb cable with
the following log:

irq 42: nobody cared (try booting with the "irqpoll" option)
CPU: 0 PID: 146 Comm: charger Not tainted 3.10.104 #133
[<c0014088>] unwind_backtrace+0x0/0xe0
[<c00118cc>] show_stack+0x10/0x14
[<c00b0be0>] __report_bad_irq+0x28/0xb8
[<c00b0e68>] note_interrupt+0x138/0x1cc
[<c00aef88>] handle_irq_event_percpu+0x2c0/0x2f4
[<c00aeff8>] handle_irq_event+0x3c/0x5c
[<c00b1a20>] handle_fasteoi_irq+0xbc/0x124
[<c00ae764>] generic_handle_irq+0x20/0x30
[<c000e4cc>] handle_IRQ+0x64/0x8c
[<c000853c>] gic_handle_irq+0x38/0x5c
handlers:
[<c042b3ec>] dwc_otg_common_irq
[<c0438704>] dwc_otg_pcd_irq
[<c03fab48>] usb_hcd_irq
Disabling IRQ #42

Change-Id: Id36717ae68e02226255c1207aeded0bd6fb356cd
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-08-11 15:32:23 +08:00
Jacob Chen
5f173fa7d8 ARM: dts: rk3288-evb: set "system-power-controller" for act8846
PMIC should set "system-power-controller" in dts, otherwise
it couldn't be closed when system shutdown.

Change-Id: I3efd7efb1b1911621f21e8a741e2f6c2eebb60dc
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-08-11 15:00:38 +08:00
Zheng Yang
d954549584 drm/rockchip: hdmi: disable RK3368 2160P RGB444/YCbCr444/YCbCr422 mode
Change-Id: I573db9cd41031f45cac359fc9314491ebd1ba8fc
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-08-11 14:54:13 +08:00
Mark Yao
d1917fb492 drm/rockchip: vop: correct dclk_ddr define for rk3368
dclk_ddr is supported on rk3368 vop, it would effect the
display quality on YUV420 mode.

Change-Id: Ia624a1f397e732d80d3908b8e712ae79d3ad7948
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reported-by: Huacong Yang <will.yang@rock-chips.com>
2017-08-11 10:01:48 +08:00
Elaine Zhang
a36a1a666f clk: rockchip: add special approximation to fix up fractional clk's jitter
From Rockchips fractional divider description:
  3.1.9  Fractional divider usage
  To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
  fractional divider. Generally you must set that denominator is 20 times
  larger than numerator to generate precise clock frequency. So the
  fractional divider applies only to generate low frequency clock like
  I2S, UART.

Therefore add a special approximation function that handles this
special requirement.

Change-Id: I80260392539da9d8cab79a5f6e37534d003bdbd1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-08-10 12:13:49 +08:00
Elaine Zhang
18138af79b clk: fractional-divider: allow overriding of approximation
Fractional dividers may have special requirements concerning numerator
and denominator selection that differ from just getting the best
approximation.

For example on Rockchip socs the denominator must be at least 20 times
larger than the numerator to generate precise clock frequencies.

Therefore add the ability to provide custom approximation functions.

Change-Id: I656a5851a3e2581b7f1b44bd67681ac00172873d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-08-10 12:13:28 +08:00
Geliang Tang
cf30714766 UPSTREAM: clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
to_clk_*(_hw) macros have been repeatedly defined in many places.
This patch moves all the to_clk_*(_hw) definitions in the common
clock framework to public header clk-provider.h, and drop the local
definitions.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 5fd9c05c84)

Change-Id: Ib0f9de8b9aeb30302b9d21e6668a35d18764517e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-08-10 12:13:17 +08:00
Elaine Zhang
594ae9da1e dt-bindings: add documentation for rk3126 clock
This add bindings documentation for rk3126 SoCs.

Change-Id: I1ff436e123698ff7ed6c10366a2da6907d9199a6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-08-10 12:12:50 +08:00
Mark Yao
acec133d76 arm64: dts: rockchip: rk3399-android: add secure memory
Change-Id: I247c1d4351d03196662f96fc95fc8ce35bc57326
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-10 11:50:38 +08:00
Mark Yao
03d6a385ab dt-bindings: rockchip: drm: add secure memory region
Change-Id: Ibbfae144d5b79972ffa913801c7054c8af4bcd41
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 16:38:06 +08:00
Mark Yao
0fc8ce4b39 drm/rockchip: gem: support secure memory
Change-Id: I91dfbbfbf5d13983edfb79585e9beb980566f784
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 16:36:50 +08:00
Mark Yao
258970afc5 drm/rockchip: gem: add get phys ioctl
Change-Id: Ic9b8c6acfaeb47ec720dbad3d8f5141ef7b13e5d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 16:35:04 +08:00
Mark Yao
2965ada189 drm/rockchip: gem: support force alloc cma buffer with flags
Change-Id: I4749eac53609f865d0d4230364b1cbaf39ee0955
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 16:34:59 +08:00
Sandy Huang
9cd1d94f3f drm/rockchip: lvds: RGB output should enable LVDS channel 1
Change-Id: Iaa7b95f1316fa77425992574288b3262d5af84e7
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-08-09 16:16:12 +08:00
Sandy Huang
6e49287024 drm/rockchip: lvds: set funcs structures to const
Change-Id: Ie118a1184a315c8cb7808a14a87f23c8c9a47757
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-08-09 16:15:00 +08:00
Sandy Huang
69b4bbba55 drm/rockchip: lvds: add pinctrl for rk3288 rgb output
Change-Id: I4c483eb269d021860fe4249a3d25bcfb6c4f3f5f
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-08-09 16:12:47 +08:00
Mark Yao
93f90ec2cb video/rockchip: rga2: correct BGRA stride
Change-Id: I019e2e410936f43b244ddde260cbd51c16a175e4
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 15:03:37 +08:00
Finley Xiao
a54bcc81e0 PM / devfreq: rockchip_dmc: Fix locking when rounding rate
There's no need to take the rcu read lock when rounding rate.

This patch fixes the following BUG:
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:620
in_atomic(): 0, irqs_disabled(): 0, pid: 153, name: kworker/u16:2
5 locks held by kworker/u16:2/153:
 #0:  ("%s"("devfreq_wq")){......}, at: [<ffffff80080b8cf4>] process_one_work+0x1c4/0x58c
 #1:  ((&(&devfreq->work)->work)){......}, at: [<ffffff80080b8cf4>] process_one_work+0x1c4/0x58c
 #2:  (&devfreq->lock){......}, at: [<ffffff80089534c8>] devfreq_monitor+0x28/0x8c
 #3:  (&vop->vop_lock){......}, at: [<ffffff80084c826c>] dmc_notifier_call+0x14/0x34
 #4:  (rcu_read_lock){......}, at: [<ffffff80089557f0>] rockchip_dmcfreq_target+0x0/0x2e0
CPU: 3 PID: 153 Comm: kworker/u16:2 Not tainted 4.4.77 #2573
Hardware name: Rockchip Sheep board (DT)
Workqueue: devfreq_wq devfreq_monitor
Call trace:
[<ffffff8008089930>] dump_backtrace+0x0/0x1c8
[<ffffff8008089b0c>] show_stack+0x14/0x1c
[<ffffff800839718c>] dump_stack+0x8c/0xac
[<ffffff80080c8d5c>] ___might_sleep+0x11c/0x128
[<ffffff80080c8ddc>] __might_sleep+0x74/0x84
[<ffffff8008c371a4>] mutex_lock_nested+0x4c/0x39c
[<ffffff80089458d8>] clk_prepare_lock+0x58/0xc8
[<ffffff8008946ec8>] clk_round_rate+0x34/0x94
[<ffffff800895589c>] rockchip_dmcfreq_target+0xac/0x2e0
[<ffffff80089533f4>] update_devfreq+0x100/0x1ac
[<ffffff80089534d0>] devfreq_monitor+0x30/0x8c
[<ffffff80080b8e1c>] process_one_work+0x2ec/0x58c
[<ffffff80080ba16c>] worker_thread+0x300/0x428
[<ffffff80080bf3e0>] kthread+0x104/0x10c
[<ffffff8008082840>] ret_from_fork+0x10/0x50

Change-Id: I31f75a55da72cab597796edd5c339222094fff97
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-08-09 12:48:20 +08:00
Zhen Chen
f52f7396d8 ARM: dts: rk312x: add node for GPU
Change-Id: If5942626e2d99fcfd341cbceec3b367d0e9def1a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2017-08-09 11:43:16 +08:00
Mark Yao
b34356fc63 drm/rockchip: vop: zpos set to INT_MAX if not enabled
Change-Id: Ia78c26f400d0cc4192cae183f83b7f06575c9332
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 09:39:27 +08:00
Mark Yao
2421f54c77 drm/rockchip: vop: correct win23 alpha define
Change-Id: I3e3bfbb9164b35a9f96d4bc71ab4c023d8270fc5
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-08-09 09:38:37 +08:00
Sandy Huang
59971be7a4 drm/rockchip: lvds: mipi_lvds_ctl set to mipi dsi controller base address
So we can define reg offset according to TRM, otherwise it will make
us confused.

Change-Id: I1687542fcaf7ac4e6e78d863e8940f6604794407
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-08-09 09:33:42 +08:00
Sandy Huang
5d365c42c8 drm/rockchip: lvds: update rk336x according rk3288 lvds function define
Change-Id: I9dbb9dc55f3d6d7ae498e94f595e8de47c6a4d43
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-08-09 09:33:32 +08:00