ES7243E is 2-ch ADC with I2S interface for Microphone Array
Replace digital_mute with mute_stream
Change-Id: I3c61f5feccad9362e2859d7646e88a0e990c998c
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Although stereo transmission, actually only 1ch data,
just to adapt the controller of only support stereo and above.
Change-Id: I0f2d6d1b43954080a980d4e4b8ea8f3ca8207d7b
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
This patch adds driver support for rk3308 codec.
Change-Id: Ieccdebaa27f4a46f6de9406046a6e02e20398013
Signed-off-by: Fenrir Lin <fenrir.lin@rock-chips.com>
This patch adds driver support for rk3228 codec.
Replace digital_mute with mute_stream
Change-Id: Icf83257726f12558cbdde4d4b2876dc8a3123626
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This patch adds driver support for rk1000 codec.
Replace digital_mute with mute_stream
Change-Id: I025415287f8436d5672b8f1f8d81d87c8273772a
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
The system tick may be modified by NTP when we connect
with network, then jiffies have an offset compared to
the local clock, it will cause the irq_pos / delta_play /
delta_capt also be inaccurate.
Therefore, we need a way to get raw jiffies which follows
local raw clocks.
Change-Id: I9be1790dfd98e430982dad6f03b04532889279a6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
The disvr usb audio sampling rate is through nanoc reported to
the kernel, so don't need the kernel again set the sampling rate.
Change-Id: I60409fc579952a196c4fe40f678e87d505a7508d
Signed-off-by: wjh <wjh@rock-chips.com>
clk pointer gets cached in the driver's private data and
can be used later instead of a __clk_lookup() call.
clk provider clk_data.clks[] and we can reference
the clk pointers directly rather than using __clk_lookup()
with global names.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I058413a912e0eaf5bf551d2515ad55ae28709985
Rockchip common clocks to support GKI,
Avoid __clk_lookup() calls,so needed to replace the
rockchip_clk_protect_critical, and use the flag
CLK_IS_CRITICAL.(but use flag CLK_IS_CRITICAL,
the enable count is always "0")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Idfccd72db2abe43d5f3236e7bd065873b62279ea
The maximum alpha is 255, but after the product of color and alpha
in the blend formula, the final result is >> 8 (/256) instead of
/255, which will introduce errors.
This fix is that when alpha is 0x80~0xff, then +1.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ibba964f29a11eb226aa008a0dd5bf89048524b43
By making the Y channel and the UV channel's access address equal,
the function of RGA input grayscale image is realized, without
need to allocate extra UV channel memory.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I0110ec6935c7233905e724be3df9f4fba9ef8cf0
Some features are not updated to compat_ioctl, so add them.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Id89a0826a4125af97398200f7ce6e3cc73de4342
Fix some modes that did not set the U/V address and
cause the output error of the YUV format image.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I41abd364576e0a73fd501f3dfc726eeaa6c9b118
Here a short summary of the changes:
- Modify the definition of proc ops
- Support mq
- Remove mtd partition support
- Add an independent GC thread to do garbage collection in idle time
- Remove some apis that are no longer used
Change-Id: I2ea7fe6218b32666b91fce54bc17f976feb7f4d2
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
before the patch:
ls /dev/ttyS
ttyS0 ttyS1 ttyS2 ttyS3 ttyS4 ttyS5 ttyS6 ttyS7
after the patch:
ls /dev/ttyS
ttyS3 ttyS4 ttyS6
Change-Id: I844523408751cb579bbfb50fafb7923d5c2cafdf
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
As policy->cur may be changed by thermal and cpufreq_suspend,
the setspeed may be changed after resume.
Change-Id: I6d4e0672ff39127c522f305719afd52806c31f48
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Now a regulator device can supply multiple consumers at the same time,
if a consumer starts and set a low voltage, another consumer doesn't
start in kernel but has been set a high frequency in bootloader will
abort.
This patch implements the same function as the commit
d712e9b8d5 ("regulator: core: Add support to limit min_uV during system startup")
in 4.19.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3266d120c1b9327248a509196c0c32a26c0c355e
This change allows the user to read and edit regulator information
in user space through the debugfs file system.
Base on msm work.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I038d2ad43ece4ed927db1ff36c7d1a644c1cf3d1
HDR window is fixed(not move in the overlay path with port_mux change)
and is the most slow window. And the bg is the fast. So other windows
and bg need to add delay number to keep align with the most slow window.
The delay number list in the trm is a relative value for port_mux set at
last level.
Change-Id: I731b909c0a3f483be081e16610536b4ce5b9b8b0
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
When area0 is disabled, all other sub multi area must be
disabled, or the win may run into unexpected situlation:
such as post_buf_empty or iommu fault.
Change-Id: I8a92e45849cfc31af029ba0e86562751be92ddbd
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
when only one vp(crtc) is registered to drm, all the
plane->possible_crtc will be force set to this crtc.
this make current hwc think that all these planes can be
assigned to this crtc, but the mirror plane(rk3566 feature)
cant't be activated on the same crtc with source plane.
So if some boards only use one vp(crtc), don't register
mirror plane.
Change-Id: Ib25246cf44a0fc4caf98e7c6d21ebba18f1a6c88
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
