If hdmi is enabled in uboot and pluged out when booting kernel,
the hdmi phy is still enabled. It's better to disable it to
match the real status.
Change-Id: Ia1c5ede6499ee277d08c35a85c50e3257305f90f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Under following processes, rxsense will be not match the real
signal status.
1. HDMI plug in, irq is triggered.
2. HDMI irq is mute in dw_hdmi_hardirq, bring up dw_hdmi_irq.
3. For HDMI connection is not stable, phy_stat read in
dw_hdmi_irq may be zero, then hdmi->rxsense will be false.
4. Connection fallback to stable, but dw_hdmi_irq had not
unmute the irq, irq is not triggered again, and hdmi->rxsense
keep false.
5. repo_hpd_event inform HDMI is pluggned in, dw_hdmi_bridge_enable
is called to enable HDMI. For rxsense is flase, bridge is not
powered up.
When repo_hpd_event is called, we think HDMI connection is stable,
updating rxsense is reliable.
Change-Id: Ie1f52f65b15e9a603dad9200529202053528a390
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
On rockchip platform, hdmi input format is YCbCr444 when output mode
is YCbCr422. Then the value of HDMI_TX_INVID0 on YCbCr422 is same as
the value of YCbCr444, both is 0x09/0x0b. This make enc_out_bus_format
stroed in struct hdmi_data is wrong, which is MEDIA_BUS_FMT_YUV8_1X24
or MEDIA_BUS_FMT_YUV10_1X30.
When android set enc_out_bus_format to YCbCr422, dw_hdmi_setup will be
called and logo will flash.
This patch use colorspace restored in HDMI_FC_AVICONF0 to distinguish them.
Change-Id: I6b913951b58fb47628617c11d6059bc1be4e370a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If hdmi is enabled in uboot, hdmi->disabled and bridge_is_on and
phy status need to be updated.
Change-Id: Ib21d894b673bf12b46a271c91d3e08fe7475ea89
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If vop return error when showing kernel logo, connector atomic flush
will not be call, and mc_clkdis can not be updated.
This patch update mc_clkdis in the dw_hdmi_bind, when phy clock is
locked and HPD is connected.
Change-Id: I1498d787a993961fe75236c309ecc3c898d611a4
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
avoid out of value range calculate catmdsclk when 4k10bit and set
scdc high tmds clock ratio when mtmdsclock is more than 340000000
Change-Id: I8aed4c99813e43c69526f3918d5e7024879d3288
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
if bootup with hdmi plugin initialize mtmdsclock to modify voicelessness
and set bridge_is_on true to modify green screen when reboot from recovery
Change-Id: I0ed9f956d62ab4087cb42a54dafba6a0fc9e5a7e
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
if get edid error at bootup the input bus format will be set as
rgb and hdmi is no reinit, so hdmi color will be wrong if set yuv
in uboot, now reinit hdmi in this case.
Change-Id: I8d117b6e241079ceab44793f6566adf91e9d84c6
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
Convert drivers to use the new of_graph_get_remote_node() helper
instead of parsing the endpoint node and then getting the remote device
node. Now drivers can just specify the device node and which
port/endpoint and get back the connected remote device node. The details
of the graph binding are nicely abstracted into the core OF graph code.
This changes some error messages to debug messages (in the graph core).
Graph connections are often "no connects" depending on the particular
board, so we want to avoid spurious messages. Plus the kernel is not a
DT validator.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Liviu Dudau <liviu.dudau@arm.com>
Tested-by: Eric Anholt <eric@anholt.net>
Tested-by: Jyri Sarha <jsarha@ti.com>
Tested by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
(cherry picked from commit 86418f90a4)
Conflicts:
Only merge the file of drivers/gpu/drm/bridge/dumb-vga-dac.c
Change-Id: Ie8fd230f6d150ac8585e0b5418cbbca240b1d2f6
Signed-off-by: Jerry Xu <xbl@rock-chips.com>
The ADV7123 is a transparent VGA DAC. Unlike dumb VGA DACs it can be
controlled through a power save pin, and requires a power supply.
However, on most boards where the device is used neither the power save
signal nor the power supply are controllable.
To avoid developing a separate device-specific driver add an
"adi,adv7123" compatible entry to the dumb-vga-dac driver. This will
allow supporting most ADV7123-based boards easily, while allowing future
development of an adv7123 driver when needed without breaking backward
compatibility.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170302104728.7150-4-laurent.pinchart+renesas@ideasonboard.com
(cherry picked from commit d29ffab591)
Change-Id: I3447fa126b120911400fd9ec22a05dbb1598251e
Signed-off-by: Jerry Xu <xbl@rock-chips.com>
When uboot logo is enabled, hdmi will not be setup again.
In this case, kernel driver will set wrong mc_clkdis value
when cec enable. So mc_clkdis should be got from uboot.
Change-Id: Idb9984d981489287966f2719f6ed4c729a183b58
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
When hdmi HPD is occurred, call cec_notifier_repo_cec_hpd.
Change-Id: If2047121c8ccf55e9a49fa4c3c4ec2187248a593
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
to Improve signal compatibility disable scamble when tmdsclk less than
340Mhz by default. and can enable it by define "scramble-low-rates;"
in dts file.
Change-Id: I0bd5d8e2ea4df065d84018615d4c39cac7ac441a
Signed-off-by: xuhuicong <xhc@rock-chips.com>
If put cec_notifier_set_phys_addr in rxsense setup, hdmi->mutex may
become deadlock. Because cec_notifier_set_phys_addr will call
dw_hdmi_cec_enable which cause hdmi->mutex become deadlock.
Change-Id: I4fed641c9e9d7674451402a973196ef0efeb198f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Support the "cec" optional clock. The documentation already mentions "cec"
optional clock and it is used by several boards, but currently the driver
doesn't enable it, thus preventing cec from working on those boards.
And even worse: a /dev/cecX device will appear for those boards, but it
won't be functioning without configuring this clock.
Changes:
v4:
- Change commit message to stress the importance of this patch
v3:
- Drop useless braces
v2:
- Separate ENOENT errors from others
- Propagate other errors (especially -EPROBE_DEFER)
Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20171125201844.11353-1-phh@phh.me
(cherry picked from commit ebe32c3e28)
Change-Id: I084e254f7ee1b2c537d3f18897d64578e8bfd482
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
According to HDMI 2.0 chapter 6.1, for TMDS character Rates
avove 340Mcsc, the TMDS Clock Rate shall be one fourth of
the TMDS Character Rate.
Change-Id: I4cc78aa1a5fbf6cec93e787dde49e482d0b4d342
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
RK3368/RK3399 mpll input clock rate is twice of mpll output
in YCBCR420 mode. This patch introduce mpll_cfg_420 to get
the platform YCBCR420 phy setting. If mpll_cfg_420 is not
exist, use mpll_cfg.
Change-Id: I7910a75394cf371a8008f8a83e3ab9ec14e9a68a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The configured value sets H13T PHY PLL to multiply pixel clock by the
factor in order to obtain the desired repetition clock. For the CEA
modes some are already defined with pixel repetition in the input video.
So for CEA modes this shall be always 0.
Change-Id: Iea4a00247f25c134dbd67ba77c00eb4393622385
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
To avoid screen flash when updating CSC, we introduce connector
atomic_begin. Before flush crtc and connector, it's need to send
AVMUTE flag to make screen black, and clear flag after CSC updated.
AVMUTE -> Update CRTC -> Update HDMI -> Clear AVMUTE
Change-Id: Id47caac1e25fcce5a5aa7b879da4a6b9a9bab8a1
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Introduce status node in debugfs to show HDMI output status,
such as phy status, color and eotf.
Here is a sample log:
PHY enabled Mode: HDMI
Pixel Clk: 594000000Hz TMDS Clk: 594000000Hz
Color Format: YUV422 Color Depth: 10 bit
Colorimetry: ITU.BT2020 EOTF: ST2084
x0: 0 y0: 0
x1: 0 y1: 0
x2: 0 y2: 0
white x: 0 white y: 0
max lum: 0 min lum: 0
max cll: 0 max fall: 0
Change-Id: I5d458b633dd3bd9aab67cc91f1695621937e58f5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.
This function is introduced in the 2.11a version.
Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
To support YCBCR420 10bit, we need to enable mpll output divider.
It is also compatible with YCBCR420 8bit mode.
Change-Id: I6028cfb045efd05c2cb2b9920e32901ea5aa95dc
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
According to HDMI 1.4b specification: If the transmitted video
format has timing such that the phase of the first pixel of
every Video Data Period corresponds to pixel packing phase 0
(e.g. 10P0, 12P0, 16P0), the Source may set the Default_Phase
bit in the GCP. The Sink may use this bit to optimize its filtering
or handling of the PP field.
This means that for 10-bit mode the Htotal must be dividable by 4;
for 12-bit mode, the Htotal must be divisible by 2.
Change-Id: I02e632d095141cbabcba06dc1321ae0dc69dc736
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Introduce dw_hdmi_connector_atomic_flush to implement connector
atomic_flush.
Only when enc_in_encoding/enc_out_encoding/enc_in_bus_format/
enc_out_bus_format changed, dw_hdmi_setup is called.
Introduce previous_pixelclock/previous_tmdsclock/mtmdsclock to
determine whether PHY needs initialization. If phy is power off,
or mpixelclock/mtmdsclock is different to previous value, phy is
neet to be reinitialized.
Change-Id: I1984fb188ba486de18f6d51b7a51320bbf2bc27d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDR_PANEL_METADATA is used to indicate HDR capacity of sink device.
Change-Id: I598a7bb5634f14b57f94135fd3be6b0ad2075116
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Introduce mtmdsclock to record tmds clock, which is different
to mpixelclock in deep color mode. Use this variable to select
synopsys phy curr_ctrl/phy_config, and audio N/CTS.
Change-Id: Ia78dee9c4901d2f1ca7f339dfb030d65bbf6861d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Application need to listen HDMI connector state when connector is
forced on/off, so we add switch_set_stat in dw_hdmi_connector_force.
Change-Id: I2b76a0a647eb6a4cfde7584e085f53540d0fa27f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The version of RK3288 HDMI is 0x200a, it doesn't support ycbcr420 mode.
Change-Id: I65ee16ae79f42fd13514db8e5819db6d07db9d3d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
