Commit Graph

1280567 Commits

Author SHA1 Message Date
Huang zhibao
7a01c7bd00 arm64: dts: rockchip: add rk3308-partybox-ext-rolling-v10 devicetree
Change-Id: Ifbf385e5639c638151066aa37442d50b79245d19
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
2025-02-27 16:28:27 +08:00
Huang zhibao
2f178aa341 arm64: dts: rockchip: rk3308-evb-audio-v10-display-rgb: delete rgb panel reset and enable gpios
Change-Id: I54403b463aeb4cd76b1cc468e0cc0e27f3438d75
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
2025-02-27 16:21:08 +08:00
Zou Dengming
b771ed799a arm64: dts: rockchip: rk3308 partybox: isolate the cpu2 for audio algorithm
Change-Id: I8d77da73e437f2869751231003bcc86e88654e8c
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
2025-02-27 16:21:08 +08:00
Tony Zheng
205409e7a0 arm64: dts: rockchip: Add dts file for AMP system on rk3308-evb-audio-v10 board
Change-Id: I4b57f6254b81dc02a642fdac4fa6ebd874460cf8
Signed-off-by: Tony Zheng <tony.zheng@rock-chips.com>
2025-02-27 16:20:42 +08:00
Huang zhibao
655b6b53cb arm64: dts: rockchip: rk3308-partybox: Add rk3308 partybox Demo coreboard devicetree
Change-Id: I437e61787062e3383fb0add99b7375dc10fad157
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
2025-02-27 16:19:09 +08:00
Huang zhibao
5b517ce5e1 arm64: dts: rockchip: rk3308-evb: Add rk3308 evb audio v10 partybox devicetree
Change-Id: Ic0abed65785b55fc3d54c4432dd608eeb9239516
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
2025-02-27 16:06:58 +08:00
Liang Chen
4e132ed3df ARM: rk3308_linux_aarch32_defconfig: enable ROCKCHIP_OPP and ROCKCHIP_SYSTEM_MONITOR
Change-Id: I38be42e8c45115c4b00a659ceca515d376293d0e
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-02-27 15:30:51 +08:00
Simon Xue
4c2e3dc57b soc: rockchip: decompress: add start_decom node for test
Take RK3588 as an example to show how to test decompress:

echo mode > /sys/devices/platform/fea80000.decompress/start_decom

“mode” means the compressed package format has following three types:

0 - LZ4
1 - GZIP
2 - ZLIB

Change-Id: Ibd264dcce964c142abb603c1a5e8ca4c14e9fe1e
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2025-02-27 12:47:08 +08:00
chaoyi.chen
7c90786eef drm/rockchip: dw_hdmi: Set output_type in dw_hdmi_rockchip_mode_valid
The &drm_crtc_helper_funcs.mode_valid() needs to know the output_type
in order to correctly validate the drm mode, especially when HDMI
request_clock > VOP2_MAX_DCLK_RATE. This should be set in
dw_hdmi_rockchip_mode_valid().

When the HDMI is plugged in, the output_type has not yet been set
when drm_mode_getconnector() is called for the first time.

[  951.213585][  T419] CPU: 0 PID: 419 Comm: hwc2-event Tainted: G           OE      6.1.118 #117
[  951.213596][  T419] Hardware name: Rockchip RK3576 TABLET V10 Board (DT)
[  951.213604][  T419] Call trace:
[  951.213612][  T419]  dump_backtrace+0xf4/0x118
[  951.213627][  T419]  show_stack+0x18/0x24
[  951.213636][  T419]  dump_stack_lvl+0x60/0x7c
[  951.213647][  T419]  dump_stack+0x18/0x38
[  951.213657][  T419]  dw_dp_encoder_mode_valid+0x78/0xac [rockchipdrm]
[  951.213812][  T419]  drm_mode_validate_pipeline+0x128/0x1f4
[  951.213824][  T419]  __drm_helper_update_and_validate+0x120/0x210
[  951.213834][  T419]  drm_helper_probe_single_connector_modes+0x388/0x594
[  951.213844][  T419]  drm_mode_getconnector+0x260/0x5bc
[  951.213855][  T419]  drm_ioctl_kernel+0xf8/0x184
[  951.213864][  T419]  drm_ioctl+0x2cc/0x528
[  951.213872][  T419]  __arm64_sys_ioctl+0xa8/0xe4
[  951.213884][  T419]  invoke_syscall+0x58/0x118
[  951.213896][  T419]  el0_svc_common+0xb4/0xf4
[  951.213906][  T419]  do_el0_svc+0x24/0x80
[  951.213916][  T419]  el0_svc+0x2c/0x90
[  951.213926][  T419]  el0t_64_sync_handler+0x68/0xb4
[  951.213935][  T419]  el0t_64_sync+0x1a4/0x1a8
[  951.213974][  T419] CPU: 0 PID: 419 Comm: hwc2-event Tainted: G           OE      6.1.118 #117
[  951.213984][  T419] Hardware name: Rockchip RK3576 TABLET V10 Board (DT)
[  951.213991][  T419] Call trace:
[  951.213997][  T419]  dump_backtrace+0xf4/0x118
[  951.214006][  T419]  show_stack+0x18/0x24
[  951.214015][  T419]  dump_stack_lvl+0x60/0x7c
[  951.214024][  T419]  dump_stack+0x18/0x38
[  951.214034][  T419]  vop2_crtc_mode_valid+0x60/0x278 [rockchipdrm]
[  951.214163][  T419]  drm_mode_validate_pipeline+0x1b8/0x1f4
[  951.214173][  T419]  __drm_helper_update_and_validate+0x120/0x210
[  951.214183][  T419]  drm_helper_probe_single_connector_modes+0x388/0x594
[  951.214193][  T419]  drm_mode_getconnector+0x260/0x5bc
[  951.214203][  T419]  drm_ioctl_kernel+0xf8/0x184
[  951.214211][  T419]  drm_ioctl+0x2cc/0x528
[  951.214220][  T419]  __arm64_sys_ioctl+0xa8/0xe4
[  951.214230][  T419]  invoke_syscall+0x58/0x118
[  951.214240][  T419]  el0_svc_common+0xb4/0xf4
[  951.214251][  T419]  do_el0_svc+0x24/0x80
[  951.214260][  T419]  el0_svc+0x2c/0x90
[  951.214270][  T419]  el0t_64_sync_handler+0x68/0xb4
[  951.214279][  T419]  el0t_64_sync+0x1a4/0x1a8

Change-Id: Idbb7e760c8bde3f538b88e4d5e06a778b2fc387c
Signed-off-by: chaoyi.chen <chaoyi.chen@rock-chips.com>
2025-02-27 04:44:15 +00:00
Andy Yan
aa6da9dd81 drm/rockchip: dw-dp: Remove unused grf struct
Change-Id: Ib0191d7e1244a86f445e186c3b0c40510cb887df
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2025-02-27 04:19:24 +00:00
XiaoDong Huang
12dd7eabc2 firmware: rockchip_sip: support gpio_config
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Icebff7235e875c8b8f3dcde22af5be2b04cff274
2025-02-27 04:18:32 +00:00
Shawn Lin
8668d80571 PCI: rockchip: dw-ep: Hide broken ATS cap
From chip design point of view, ATS support wasn't implemented in EP mode,
but leaving ATS cap available for both of EP and RC mode is totally broken
if servers active IOMMU and ATS support.

Reports state the problem are:

(1)When running the rk3588 in endpoint mode, with an Intel host with IOMMU
enabled, the host side prints:
DMAR: VT-d detected Invalidation Time-out Error: SID 0

(2)When running the rk3588 in endpoint mode, with an AMD host with IOMMU
enabled, the host side prints:
iommu ivhd0: AMD-Vi: Event logged [IOTLB_INV_TIMEOUT device=63:00.0 address=0x42b5b01a0]

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I7763f304bb3b71c11a67579803b2531ab7538133
2025-02-27 04:17:58 +00:00
Mingwei Yan
fa77b3acb0 media: rockchip: vpss: fix idle_lock not init
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I8666c0deb030dd62e37c44494b23cd37fb18cb25
2025-02-27 04:17:43 +00:00
Damon Ding
d47cbf2c54 phy/rockchip: samsung-hdptx: fix the warning "passing zero to 'dev_err_probe'"
Change-Id: Iba9bfd478f7c886b98010f0b059543c89241c8f9
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Damon Ding
2aa5aff468 phy/rockchip: samsung-hdptx: add support for RBR and HBR pe/vs configurations in DP mode
For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2.

According to the SI test result, the new RBR and HBR pe/vs
configurations can better meet the DP v1.2 signal specification
requirements.

Change-Id: I3dfc1facebe0bf5fb7bc1d35b9fd397aefa71948
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Damon Ding
62667f80c0 drm/bridge: analogix_dp: add support forced switching to eDP mode
The bridge drivers is various, so the check of switching the
eDP/DP mode may not cover all application scenario.

Therefore, we add a property of the eDP node to support forced
switching to eDP mode, and the DT setting may be like:

&edp {
	edp-mode;
};

Change-Id: I4f808b57def701e96d63d2470c2ec904e0ab29a5
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Damon Ding
22815e8c10 drm/bridge: analogix_dp: add support forced switching to DP mode
Some bridges support to convert DP into display interfaces that support
the panel, such as RGB, LVDS, MIPI and so on. For instance, the LT7211B
and LT7911D from Lontium can offer this functionality.

Therefore, we add a property of the eDP node to support forced switching
to DP mode, and the DT setting may be like:

&edp0 {
	dp-mode;
};

Change-Id: I0f7c2598f86fb9d5ebedc945e3acd66388215d16
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Damon Ding
93581efcee drm/bridge: analogix_dp: support for switching the eDP/DP mode
Since the Analogix IP can support both eDP v1.3 and DP v1.2, it is
sensible to first check whether the last bridge is connected to a
panel in order to determine and pass on the eDP/DP submodes to the
PHY, which can help separate the eDP/DP configurations in the PHY
driver.

Change-Id: I86e1c52e15f9348ff9524caaa159f92e5c6fc5de
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Damon Ding
e802519120 drm/rockchip: analogix_dp: add flag support_dp_mode to check if the platform supports DP mode
For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2, which has the different PHY configurations to separate
eDP and DP mode.

Change-Id: I04d72c1230e939b647c5f79c0351f621ade5510d
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-27 04:16:44 +00:00
Liang Chen
c80c3bfd4c arm64: dts: rockchip: rk3308-evb-v11: remove dmc node
The VDD_LOGIC of rk3308-evb-v11 is fixed, so do not enable dmc.

Change-Id: I17bf982d8d4107f8ce474b80c9e80d3e610d6029
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-02-27 11:21:36 +08:00
Liang Chen
08c6f19872 arm64: rk3308_linux_defconfig: enable ROCKCHIP_OPP and ROCKCHIP_SYSTEM_MONITOR
Change-Id: Ia8d876001e1553e741d15791ae8b5d3b0ae43c74
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-02-27 11:11:20 +08:00
Sugar Zhang
b78576425c arm64: dts: rockchip: rk3528: Use cts manual for HDMI
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id80ed442248c1a4c2639fa824c27752ced4b22f5
2025-02-27 02:39:26 +00:00
Sugar Zhang
24edb38f8f drm/bridge: synopsys: dw-hdmi: Add support for cts-manual
The current driver use HDMI hardware's auto CTS mode. We found
that at high sample rates, the auto-calculated CTS value is incorrect,
leading to silent outputs on devices that rely on n/cts to recover
the sample rate, such as TV.

Auto CTS mode was introduced in commit fdbdcc83ff ("drm/bridge: dw-hdmi:
Use automatic CTS generation mode when using non-AHB audio") to handle
cases where audio clock and TMDS clock are not sourced from the same PLL.
However, on RK platforms where both clocks are derived from the same PLL.

This patch adds a "cts-manual" property to allow manual CTS configuration
when clocks are co-sourced.

Fixes: fdbdcc83ff ("drm/bridge: dw-hdmi: Use automatic CTS generation mode when using non-AHB audio")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I2f52499150d3e37652e21c0b863447e1a6ac5831
2025-02-27 02:39:26 +00:00
Sugar Zhang
4bdb54ffcb drm/bridge: synopsys: dw-hdmi: Fix nlpcm bitstream
Clear the Audio Logic to fix the NLPCM and HBR situation switch.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I98c25e36c76c1308c5b4d50a1d861e3b043e2235
2025-02-27 02:39:26 +00:00
Sugar Zhang
944315b15a arm64: dts: rockchip: rk3528: Enable CLK-ALWAYS-ON for HDMI-SAI
Change-Id: I3863a2f5f080a1e59b02e00014b3eb32d8162839
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2025-02-27 02:39:26 +00:00
Shawn Lin
2eae2ccf32 PCI: rockchip: dw: Mask and unmask misc irq
Other types of irq should only be fired during linked state, except
misc irq. Masking it to keep suspend and resume in noirq environment,
otherwise we might occur accessing dbi in irq for hot reset case while
resuming haven't finished, which causing the system hung.

Thread #1 (Suspended : Step)
dw_pcie_read() at pcie - designware.c:106 0xfffffc0106809d0
dw_pcie_read_dbi() at pcie - designware.c:147 0xfffffc0106809d0
dw_pcie_readl_dbi() at pcie - designware.h:315 0xfffffc01068686c
rk_pcie_sys_irq_handler() at pcie - rockchip.c:1,432 0xfffffc01068686c
__handle_irq_event_percpu() at handle.c:156 0xfffffc0100ccd50
handle_irq_event_percpu() at handle.c:196 0xfffffc0100cd03c
handle_irq_event() at handle.c:213 0xfffffc0100cd03c
handle_fasteoi_irq() at chip.c:732 0xfffffc0100d2b00
generic_handle_irq_desc() at irqdesc.h:152 0xfffffc0100cbc70
__handle_domain_irq() at irqdesc.c:693 0xfffffc0100cbc70
<...more frames...>

Fixes: bb9632320ba7 ("PCI: dw: rockchip: Support rockchip_dw_pcie_pm_ctrl_for_user")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I2bff726b30c0c5fcaef62aa5cc80548aedbb4505
2025-02-27 02:38:10 +00:00
Tao Huang
2551a5f146 ARM: rockchip_linux_defconfig: Enable CONFIG_WERROR
Change-Id: I0a28141853b771b948a19652d7fa846c0fce1466
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2025-02-26 19:20:10 +08:00
Mingwei Yan
3f26cdc2d2 media: rockchip: vpss: refactor v_1 for rk3576
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: Iff2b7f690b9143807cb5135aa518804dbaf29614
2025-02-26 10:02:54 +00:00
Yandong Lin
a956e55572 media: rockchip: isp: set the dma_buf of wrap buf
Change-Id: I1203b4701e9e77a6bede5210f5273a4919b3536a
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
2025-02-26 16:39:24 +08:00
Yandong Lin
5e7f327ab7 video: rockchip: dvbm: Fix typo
Change-Id: Id42b53521e7b797353ef7af36764fc1d656f874e
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
2025-02-26 16:39:20 +08:00
Sandy Huang
230936ca04 drm/rockchip: drv: only rk3528/rk3566/rk3568/rk3588 need ovl lock
1. RK3566/RK3568/RK3588 VOP different VPs share one overlay logic,
so need use ovl lock to make sure they're mutually exclusive, Except
this three platform, other VOP each VP have independent overlay logic.

2. RK3528 need to reset the p2i_en bit when POST_BUF_EMPTY at
post_buf_empty_work_event(), the vop2_cfg_done() must exclusive with
userspace commit new frame.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I84feb978e00a6c5d32266cd3946610e0cc09868b
2025-02-26 08:03:13 +00:00
Finley Xiao
1e5e146f58 mali400: mali: Add support to set clk to normal pll for rk3518
Change-Id: I74440a835ef513d2f936b5b7f9a89a82ce15e021
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-02-26 15:06:57 +08:00
chaoyi.chen
2367b261cf drm/rockchip: dw_dp: Set output_type in dw_dp_encoder_mode_valid()
The output_type may changed after DP encoder bound to CRTC. For
example, when performing modeset, calling vop2_crtc_atomic_disable()
will clear the output_type to zero. When drm_mode_getconnector() is
called again, since the encoder has already been bound to the CRTC,
the output_type will not be set and will remain zero. It can lead to
the vop2_crtc_mode_valid() being unable to retrieve the correct
output_type.

This patch set output_type in dw_dp_encoder_mode_valid(), regardless
of whether encoder is already bound to a CRTC.

Change-Id: I1888d4cc44604072bbf0cbe67a0d21fa8303b7b0
Signed-off-by: chaoyi.chen <chaoyi.chen@rock-chips.com>
2025-02-25 04:00:35 +00:00
Damon Ding
de85a5fecf drm/rockchip: logo: check whether the bridge supports atomic mode before mode fixup
According to the include/drm/drm_bridge.h, the following functions
are mandatory in atomic mode:
&drm_bridge_funcs.atomic_reset()
&drm_bridge_funcs.atomic_duplicate_state()
&drm_bridge_funcs.atomic_destroy_state()

For some bridge drivers that have not supported atomic mode yet:
drivers/gpu/drm/bridge/sii902x.c
drivers/gpu/drm/bridge/rk630-tve.c
......

The drm_atomic_get_bridge_state() should not be called to get the
bridge state by the global atomic state. Without this patch, the null
pointer exception will occur.

Fixes: 3558926745 ("drm/rockchip: logo: call drm_atomic_bridge_chain_check() bridge in mode fixup")
Change-Id: I68c953db21a95bf5454fc47c65958dee9d13a8ce
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2025-02-25 10:46:30 +08:00
Sandy Huang
2f6100f677 ARM: dts: rockchip: add RK3518 evaluation board devicetree
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ib4a8a05d13fc4c2cb3732bbc9365d9c292788e3d
2025-02-24 20:04:33 +08:00
Sandy Huang
c28467ad76 arm64: dts: rockchip: add RK3518 evaluation board devicetree
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Id2d6a2792bd237db868fe1ad0844a65e77d00af3
2025-02-24 20:03:34 +08:00
Sandy Huang
5c5445c865 arm64: dts: rockchip: add core dtsi for RK3518 Soc
RK3518 is a Soc base on Rockchip RK3528, the cpu freq
is lower than RK3528 and remove PCIE/RGMII supported.

Change-Id: I9334959b598ece349dfce7e2b922cf91562c61ac
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-02-24 20:02:31 +08:00
Finley Xiao
de1f9cd3b4 cpufreq: dt-platdev: Add rk3518 project into blacklist
Change-Id: Ic18aa909ded2c4820036ea4bbaf6a60510a69078
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-02-24 19:59:24 +08:00
Finley Xiao
aa5ca65c01 soc: rockchip: cpuinfo: Add support for rk3518
Change-Id: I3061709de83521c6c98df68ba12422e2523c88ab
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-02-24 19:59:23 +08:00
Finley Xiao
422fcf5068 soc: rockchip: cpuinfo: Add support to parse 'cpu-code1'
Change-Id: I080efaae76c28fd255c314fc9033efcc02457d4d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-02-24 19:59:12 +08:00
Sugar Zhang
8edba5a8bc ASoC: rockchip: dlp: Fix loopback capture data loss
When applptr exceeds buffer boundaries, the calculated offset
becomes misaligned with the actual buffer position, causing
loopback capture data loss.

This patch fix it by applying boundary checks during applptr updates.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I7c6497a9aa7e12e9b3e1c14dcc6de74bbc1515e2
2025-02-24 11:01:21 +00:00
Simon Xue
a3ae395ec7 iio: adc: rockchip_saradc: fix bitmask for channels on SARADCv2
Change-Id: I07c3a41ca74201ac324821e707fe8ee05d42322d
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2025-02-24 18:26:59 +08:00
Jiang Yu
160d27ae72 arm64: dts: rockchip: rk3576-amp: Modify the address of the reserved-memory to ease the MCU's address remapping.
Change-Id: Id01ef28f6db51b92691f928d385e2ae5c504258e
Signed-off-by: Jiang Yu <yu.jiang@rock-chips.com>
2025-02-24 06:46:27 +00:00
Jianwei Fan
91e4a94e33 video: rockchip: vehicle: switch to using gpiod API
Change-Id: I1cb0255c09da6bdaef96299e2e6bd4b087ba5413
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
2025-02-24 06:44:02 +00:00
Lin Jianhua
bffc28f119 ARM: configs: rk3506_defconfig: support keyboard matrix
Change-Id: Ia3ef90a49f465eebdc2363f17e28eb835c4ea0e7
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
2025-02-24 10:34:05 +08:00
Sandy Huang
92379ecd7d drm/rockchip: remove unused psr_list{,_lock}
This code has been removed in the upstream version, but it's left
in the internal project.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I4d41bfa646df698d24d38c98244529f8ea53f47e
2025-02-21 17:39:29 +08:00
Ye Zhang
ab4e8bc959 soc: rockchip: pm_debug: Add gpio debug info
Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: Ia639f5285b4ef520bd980034d3bee4cd1370a6d1
2025-02-21 17:06:23 +08:00
Joseph Chen
a708fcf972 ARM: dts: rockchip: rk3502-evb1: Update io to save suspend power
gpio0_c5: pull-z and disable smt
gpio0_a0/a2: pull-z

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iac5877f14f66d18c2b69a44a12035fd17a5b6412
2025-02-21 07:42:51 +00:00
Yu Qiaowei
c75c935971 video: rockchip: rga3: support iova equal to 0
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I0fd52e2ff9ee93944d8f37c6c8ea1e7e63dff10f
2025-02-21 07:14:22 +00:00
Simon Xue
b22838f67e soc: rockchip: add /proc/rk_zoneinfo/zoneinfo
The dump zone information using the following two commands:

1. cat /proc/rk_zoneinfo/zoneinfo
2. cat /proc/rk_zoneinfo/zoneinfo > /data/data/1.txt

NOTICE: dumping zone information should only be done during debugging.
The dump zone information holds the spinlock of the zone, which can
impact the performance of the memory subsystem.

==== ZONE & PAGE INFO (with page order) ====
Zone: DMA32
  managed_pages:  952984
  spanned_pages:  1048064
  present_pages:  978432

  Order: 0 | nr_free: 5
    Migrate type 0 => (empty)
    Migrate type 1 => page: fffffffe000a3940 | PFN: 00010469 | phys_addr: 0x00028e5000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 0
    Migrate type 1 => page: fffffffe0028d940 | PFN: 00041829 | phys_addr: 0x000a365000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 0
    Migrate type 2 => (empty)
    Migrate type 3 => page: fffffffe004085c0 | PFN: 00066071 | phys_addr: 0x0010217000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 0
    Migrate type 3 => page: fffffffe004089c0 | PFN: 00066087 | phys_addr: 0x0010227000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 0
    Migrate type 3 => page: fffffffe00408ac0 | PFN: 00066091 | phys_addr: 0x001022b000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 0
    Migrate type 4 => (empty)
    Migrate type 5 => (empty)

  Order: 1 | nr_free: 65
    Migrate type 0 => (empty)
    Migrate type 1 => page: fffffffe000a3980 | PFN: 00010470 | phys_addr: 0x00028e6000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 1
    Migrate type 1 => page: fffffffe0020d280 | PFN: 00033610 | phys_addr: 0x000834a000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 1
    Migrate type 1 => page: fffffffe0028d980 | PFN: 00041830 | phys_addr: 0x000a366000 | flags: 0x0 | compound: 0 | node: 0 | zone: DMA32 | buddy_order: 1
    Migrate type 2 => (empty)

Change-Id: If9227fefaa79d744ca6dde123bd50f033d30c39c
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2025-02-20 20:48:08 +08:00